Lines Matching +full:post +full:- +full:require +full:- +full:hook
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
38 * The PCI interface treats multi-function devices as independent
46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel-only defines are being added here.
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
64 return kobject_name(&slot->kobj); in pci_slot_name()
83 /* #0-5: standard PCI resources */
93 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
101 PCI_BRIDGE_RESOURCE_NUM - 1,
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
173 /* Flag for quirk use to store if quirk-specific ACS is enabled */
177 /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */
181 /* Do not use PM reset even if device advertises NoSoftRst- */
259 struct list_head bus_list; /* node in per-bus list */
263 void *sysdata; /* hook for sys-specific extension */
272 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
277 u8 msix_cap; /* MSI-X capability offset */
289 or supports 64-bit transfers. */
293 pci_power_t current_state; /* Current operating state. In ACPI-speak,
294 this is D0-D3, D0 being fully functional,
314 unsigned int d3_delay; /* D3->D0 transition time in ms */
315 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
336 unsigned int multifunction:1;/* Part of multi-function device */
341 unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */
377 struct pci_sriov *sriov; /* SR-IOV capability related */
392 if (dev->is_virtfn) in pci_physfn()
393 dev = dev->physfn; in pci_physfn()
405 return (pdev->error_state != pci_channel_io_normal); in pci_channel_offline()
443 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
470 void *sysdata; /* hook for sys-specific extension */
495 * Returns true if the PCI bus is root (behind host-PCI bridge),
498 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
499 * This is incorrect because "virtual" buses added for SR-IOV (via
500 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
504 return !(pbus->parent); in pci_is_root_bus()
508 * pci_is_bridge - check if the PCI device is a bridge
516 return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || in pci_is_bridge()
517 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; in pci_is_bridge()
523 if (pci_is_root_bus(dev->bus)) in pci_upstream_bridge()
526 return dev->bus->self; in pci_upstream_bridge()
535 return pci_dev->msi_enabled || pci_dev->msix_enabled; in pci_dev_msi_enabled()
553 * Translate above to generic errno for passing back through non-PCI code.
562 return -ENOENT; in pcibios_err_to_errno()
564 return -ENOTTY; in pcibios_err_to_errno()
566 return -ENODEV; in pcibios_err_to_errno()
568 return -EFAULT; in pcibios_err_to_errno()
570 return -EIO; in pcibios_err_to_errno()
572 return -ENOSPC; in pcibios_err_to_errno()
575 return -ERANGE; in pcibios_err_to_errno()
578 /* Low-level architecture-dependent routines */
613 * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
647 /* MMIO has been re-enabled, but not DMA */
668 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
670 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
685 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
694 * PCI_DEVICE - macro used to describe a specific pci device
707 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
721 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
722 * @dev_class: the class, subclass, prog-if triple for this device
735 * PCI_VDEVICE - macro used to describe a specific pci device in short form
757 PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */
766 /* Do NOT directly access these two variables, unless you are arch-specific PCI
777 /* Architecture-specific versions may override this (weak) */
845 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
846 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
908 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); in pci_read_config_byte()
912 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); in pci_read_config_word()
917 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); in pci_read_config_dword()
921 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); in pci_write_config_byte()
925 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); in pci_write_config_word()
930 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); in pci_write_config_dword()
966 /* user-space driven config access */
983 return (atomic_read(&pdev->enable_cnt) > 0); in pci_is_enabled()
988 return pdev->is_managed; in pci_is_managed()
993 pdev->irq = irq; in pci_set_managed_irq()
994 pdev->irq_managed = 1; in pci_set_managed_irq()
999 pdev->irq = 0; in pci_reset_managed_irq()
1000 pdev->irq_managed = 0; in pci_reset_managed_irq()
1005 return pdev->irq_managed && pdev->irq > 0; in pci_has_managed_irq()
1119 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1177 pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]); in pci_bus_address()
1181 /* Proper probing supporting hot-pluggable devices */
1194 * module_pci_driver() - Helper macro for registering a PCI driver
1206 * builtin_pci_driver() - Helper macro for registering a PCI driver
1243 #include <linux/pci-dma.h>
1248 dma_pool_create(name, &pdev->dev, size, align, allocation)
1291 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; } in pci_msi_vec_count()
1294 static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; } in pci_msix_vec_count()
1297 { return -ENOSYS; } in pci_enable_msix()
1304 { return -ENOSYS; } in pci_enable_msi_range()
1306 { return -ENOSYS; } in pci_enable_msi_exact()
1309 { return -ENOSYS; } in pci_enable_msix_range()
1312 { return -ENOSYS; } in pci_enable_msix_exact()
1361 static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } in pci_enable_ats()
1363 static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; } in pci_ats_queue_depth()
1382 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } in pci_get_new_domain_nr()
1393 return bus->domain_nr; in pci_domain_nr()
1403 /* some architectures require additional setup to direct VGA traffic */
1447 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } in pci_enable_device()
1450 { return -EIO; } in pci_set_dma_mask()
1452 { return -EIO; } in pci_set_consistent_dma_mask()
1455 { return -EIO; } in pci_set_dma_max_seg_size()
1458 { return -EIO; } in pci_set_dma_seg_boundary()
1460 { return -EBUSY; } in pci_assign_resource()
1469 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, in pci_find_next_capability() argument
1490 { return -EIO; } in pci_request_regions()
1509 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; } in pci_get_new_domain_nr()
1516 /* Include architecture-dependent settings and functions */
1522 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1523 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1524 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1530 (pci_resource_end((dev), (bar)) - \
1533 /* Similar to the helpers above, these manipulate per-pci_dev
1534 * driver-specific data. They are really just a wrapper around
1539 return dev_get_drvdata(&pdev->dev); in pci_get_drvdata()
1544 dev_set_drvdata(&pdev->dev, data); in pci_set_drvdata()
1552 return dev_name(&pdev->dev); in pci_name()
1556 /* Some archs don't want to expose struct resource to userland as-is
1564 *start = rsrc->start; in pci_resource_to_user()
1565 *end = rsrc->end; in pci_resource_to_user()
1572 * For at least a part of these bugs we need a work-around, so both
1573 * generic (drivers/pci/quirks.c) and per-architecture code can define
1582 void (*hook)(struct pci_dev *dev); member
1598 class_shift, hook) \ argument
1601 = { vendor, device, class, class_shift, hook };
1604 class_shift, hook) \ argument
1606 hook, vendor, device, class, class_shift, hook)
1608 class_shift, hook) \ argument
1610 hook, vendor, device, class, class_shift, hook)
1612 class_shift, hook) \ argument
1614 hook, vendor, device, class, class_shift, hook)
1616 class_shift, hook) \ argument
1618 hook, vendor, device, class, class_shift, hook)
1620 class_shift, hook) \ argument
1622 resume##hook, vendor, device, class, \
1623 class_shift, hook)
1625 class_shift, hook) \ argument
1627 resume_early##hook, vendor, device, \
1628 class, class_shift, hook)
1630 class_shift, hook) \ argument
1632 suspend##hook, vendor, device, class, \
1633 class_shift, hook)
1635 class_shift, hook) \ argument
1637 suspend_late##hook, vendor, device, \
1638 class, class_shift, hook)
1640 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ argument
1642 hook, vendor, device, PCI_ANY_ID, 0, hook)
1643 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ argument
1645 hook, vendor, device, PCI_ANY_ID, 0, hook)
1646 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ argument
1648 hook, vendor, device, PCI_ANY_ID, 0, hook)
1649 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ argument
1651 hook, vendor, device, PCI_ANY_ID, 0, hook)
1652 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ argument
1654 resume##hook, vendor, device, \
1655 PCI_ANY_ID, 0, hook)
1656 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ argument
1658 resume_early##hook, vendor, device, \
1659 PCI_ANY_ID, 0, hook)
1660 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ argument
1662 suspend##hook, vendor, device, \
1663 PCI_ANY_ID, 0, hook)
1664 #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ argument
1666 suspend_late##hook, vendor, device, \
1667 PCI_ANY_ID, 0, hook)
1679 return -ENOTTY; in pci_dev_specific_acs_enabled()
1709 /* Architecture-specific versions may override these (weak) */
1751 return -ENOSYS; in pci_iov_virtfn_bus()
1755 return -ENOSYS; in pci_iov_virtfn_devfn()
1758 { return -ENODEV; } in pci_enable_sriov()
1777 * pci_pcie_cap - get the saved PCIe capability offset
1789 return dev->pcie_cap; in pci_pcie_cap()
1793 * pci_is_pcie - check if the PCI device is PCI Express capable
1804 * pcie_caps_reg - get the PCIe Capabilities Register
1809 return dev->pcie_flags_reg; in pcie_caps_reg()
1813 * pci_pcie_type - get the PCIe device/port type
1831 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1832 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1857 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1868 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1879 * pci_vpd_info_field_size - Extracts the information field length
1890 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1897 * -ENOENT otherwise.
1902 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1909 * -ENOENT otherwise.
1914 /* PCI <-> OF binding helpers */
1930 return pdev ? pdev->dev.of_node : NULL; in pci_device_to_OF_node()
1935 return bus ? bus->dev.of_node : NULL; in pci_bus_to_OF_node()
1952 return pdev->dev.archdata.edev; in pci_dev_to_eeh_dev()
1963 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; in pci_set_dev_assigned()
1967 pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; in pci_clear_dev_assigned()
1971 return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED; in pci_is_dev_assigned()
1975 * pci_ari_enabled - query ARI forwarding status
1982 return bus->self && bus->self->ari_enabled; in pci_ari_enabled()