Lines Matching full:dsa
11 probed, they register to the DSA framework, passing a node
22 - dsa,member : A two element list indicates which DSA cluster, and position
41 - link : Should be a list of phandles to other switch's DSA
77 linked into one DSA cluster.
87 dsa,member = <0 0>;
138 dsa,member = <0 1>;
205 dsa,member = <0 2>;
269 - compatible : Should be "marvell,dsa"
274 - dsa,ethernet : Should be a phandle to a valid Ethernet device node
275 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
281 A DSA node can contain multiple switch chips which are therefore child nodes of
282 the parent DSA node. The maximum number of allowed child nodes is 4
304 labels are "cpu" to indicate a CPU port and "dsa" to
307 Note that a port labelled "dsa" will imply checking for the uplink phandle
311 - link : Should be a list of phandles to another switch's DSA port.
328 global dsa,mii-bus defined above, for this switch.
338 dsa@0 {
339 compatible = "marvell,dsa";
344 dsa,ethernet = <ðernet0>;
345 dsa,mii-bus = <&mii_bus0>;
370 label = "dsa";
385 label = "dsa";
390 label = "dsa";
403 label = "dsa";