Lines Matching +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out
4 02-Feb-2012
7 ------------
13 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
14 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
15 Slave Out" (MISO) signals. (Other names are also used.) There are four
16 clocking modes through which data is exchanged; mode-0 and mode-3 are most
17 commonly used. Each clock cycle shifts data out and data in; the clock
31 - SPI may be used for request/response style device protocols, as with
34 - It may also be used to stream data in either direction (half duplex),
37 - Some devices may use eight bit words. Others may use different word
38 lengths, such as streams of 12-bit or 20-bit digital samples.
40 - Words are usually sent with their most significant bit (MSB) first,
43 - Sometimes SPI is used to daisy-chain devices, like shift registers.
50 SPI is only one of the names used by such four-wire protocols, and
52 half-duplex SPI, for request/response protocols), SSP ("Synchronous
57 limiting themselves to half-duplex at the hardware level. In fact
70 ---------------------------------------
87 appropriate low-pincount peripheral bus.
94 I'm confused. What are these four SPI "clock modes"?
95 -----------------------------------------------------
99 - CPOL indicates the initial clock polarity. CPOL=0 means the
100 clock starts low, so the first (leading) edge is rising, and
101 the second (trailing) edge is falling. CPOL=1 means the clock
104 - CPHA indicates the clock phase used to sample data; CPHA=0 says
108 implies that its data is written half a clock before the first
109 clock edge. The chipselect may have made it become available.
115 low order bit. So when a chip's timing diagram shows the clock
117 trailing clock edge (CPHA=1), that's SPI mode 1.
119 Note that the clock mode is relevant as soon as the chipselect goes
120 active. So the master must set the clock to inactive before selecting
122 clock level when its select line goes active. That's why many devices
124 and always clock data in/out on rising clock edges.
128 ------------------------------------------------
142 Controller drivers ... controllers may be built into System-On-Chip
157 A "struct spi_device" encapsulates the controller-side interface between
199 the only class-specific state is the bus number ("B" in "spiB"), so
203 How does board-specific init code declare SPI devices?
204 ------------------------------------------------------
206 That information is normally provided by board-specific code, even for
212 For System-on-Chip (SOC) based boards, these will usually be platform
219 the arch/.../mach-*/board-*.c files for several boards can all share the
221 SPI-capable controllers, and only the ones actually usable on a given
224 So for example arch/.../mach-*/board-*.c files might have code like:
228 /* if your mach-* infrastructure doesn't support kernels that can
241 And SOC-specific utility code might look something like:
255 spi2->dev.platform_data = pdata2;
269 an external clock, where another derives the SPI clock from current
270 settings of some master clock.
276 on the target board, often with some board-specific data needed for the
279 Normally your arch/.../mach-*/board-*.c files would provide a small table
301 Again, notice how board-specific information is provided; each chip may need
303 clock to allow (a function of board voltage in this case) or how an IRQ pin
304 is wired, plus chip-specific constraints like an important delay that's
308 controller driver. An example would be peripheral-specific DMA tuning
311 The board_info should provide enough information to let the system work
323 Like with other static board-specific setup, you won't unregister those.
327 your arch/.../mach-.../board-*.c file would primarily provide information
332 NON-STATIC CONFIGURATIONS
348 ----------------------------------------
375 /* assuming the driver requires board-specific data: */
376 pdata = &spi->dev.platform_data;
378 return -ENODEV;
380 /* get memory for driver's per-chip state */
383 return -ENOMEM;
395 - An spi_message is a sequence of protocol operations, executed
402 buffer for each transfer direction, supporting full duplex
418 - Follow standard kernel rules, and provide DMA-safe buffers in
427 - The basic I/O primitive is spi_async(). Async requests may be
433 - There are also synchronous wrappers like spi_sync(), and wrappers
438 - The spi_write_then_read() call, and convenience wrappers around
441 common RPC-style requests, such as writing an eight bit command
442 and reading a sixteen bit response -- spi_w8r16() being one its
446 transfer mode, wordsize, or clock rate. This is done with spi_setup(),
459 - I/O buffers use the usual Linux rules, and must be DMA-safe.
463 - The spi_message and spi_transfer metadata used to glue those
466 other allocate-once driver data structures. Zero-init these.
469 routines are available to allocate and zero-initialize an spi_message
474 -------------------------------------------------
480 to get the driver-private data allocated for that device.
487 return -ENODEV;
498 publish it to the rest of the system. At that time, device nodes for the
514 If you don't have such hardware-assigned bus number, and for some reason
517 this as a non-static configuration (see above).
522 master->setup(struct spi_device *spi)
523 This sets up the device clock rate, SPI mode, and word sizes.
536 master->cleanup(struct spi_device *spi)
541 master->prepare_transfer_hardware(struct spi_master *master)
547 master->unprepare_transfer_hardware(struct spi_master *master)
552 master->transfer_one_message(struct spi_master *master,
560 master->transfer_one(struct spi_master *master, struct spi_device *spi,
577 master->transfer(struct spi_device *spi, struct spi_message *message)
592 providing pure process-context execution of methods. The message queue
593 can also be elevated to realtime priority on high-priority SPI traffic.
600 for low-frequency sensor access might be fine using synchronous PIO.
602 But the queue will probably be very real, using message->queue, PIO,
612 ---------
613 Contributors to Linux-SPI discussions include (in alphabetical order,