Lines Matching +full:system +full:- +full:bus

6 --------
10 sources over several types of trace output ports encoded in System
11 Trace Protocol (MIPI STPv2) and is intended to perform full system
16 switch (Global Trace Hub, GTH). These devices are placed on a bus of
21   - Software Trace Hub (STH), trace source, which is a System Trace
23   - Memory Storage Unit (MSU), trace output, which allows storing
24     trace hub output in system memory,
25   - Parallel Trace Interface output (PTI), trace output to an external
27   - Global Trace Hub (GTH), which is a switch and a central component
31 Documentation/ABI/testing/sysfs-bus-intel_th-output-devices, the most
37 description is at Documentation/ABI/testing/sysfs-bus-intel_th-devices-gth.
43 MSU can be configured to collect trace data into a system memory
51 [1] https://software.intel.com/sites/default/files/managed/d3/3c/intel-th-developer-manual.pdf
53 Bus and Subdevices
54 ------------------
56 For each Intel TH device in the system a bus of its own is
58 devices were emumerated. All TH subdevices (devices on intel_th bus)
59 begin with this id: 0-gth, 0-msc0, 0-msc1, 0-pti, 0-sth, which is
67 -------------
71 	$ cat /sys/bus/intel_th/devices/0-msc0/port
76 	$ echo 0 > /sys/bus/intel_th/devices/0-gth/masters/33
78 # allocate a 2-windowed multiblock buffer on the first memory
81 	$ echo multi > /sys/bus/intel_th/devices/0-msc0/mode
82 	$ echo 64,64 > /sys/bus/intel_th/devices/0-msc0/nr_pages
86 	$ echo 1 > /sys/bus/intel_th/devices/0-msc0/wrap
90 	$ echo 1 > /sys/bus/intel_th/devices/0-msc0/active
96 	$ echo 0 > /sys/bus/intel_th/devices/0-msc0/active
103 ------------------
120 will show up on the intel_th bus. Also, trace configuration and