Lines Matching +full:bitclock +full:- +full:inversion
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/clk/ti-dra7-atl.h>
15 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
22 stdout-path = &uart1;
25 evm_12v0: fixedregulator-evm12v0 {
27 compatible = "regulator-fixed";
28 regulator-name = "evm_12v0";
29 regulator-min-microvolt = <12000000>;
30 regulator-max-microvolt = <12000000>;
31 regulator-always-on;
32 regulator-boot-on;
35 evm_5v0: fixedregulator-evm5v0 {
36 /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
37 /* Output 1 of LM5140QRWGTQ1 on dra71-evm */
38 compatible = "regulator-fixed";
39 regulator-name = "evm_5v0";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 vin-supply = <&evm_12v0>;
43 regulator-always-on;
44 regulator-boot-on;
47 evm_3v6: fixedregulator-evm_3v6 {
48 compatible = "regulator-fixed";
49 regulator-name = "evm_3v6";
50 regulator-min-microvolt = <3600000>;
51 regulator-max-microvolt = <3600000>;
52 vin-supply = <&evm_5v0>;
53 regulator-always-on;
54 regulator-boot-on;
57 vsys_3v3: fixedregulator-vsys3v3 {
58 /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
59 /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
60 compatible = "regulator-fixed";
61 regulator-name = "vsys_3v3";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
64 vin-supply = <&evm_12v0>;
65 regulator-always-on;
66 regulator-boot-on;
69 evm_3v3_sw: fixedregulator-evm_3v3 {
71 compatible = "regulator-fixed";
72 regulator-name = "evm_3v3";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 vin-supply = <&vsys_3v3>;
76 regulator-always-on;
77 regulator-boot-on;
80 aic_dvdd: fixedregulator-aic_dvdd {
82 compatible = "regulator-fixed";
83 regulator-name = "aic_dvdd";
84 vin-supply = <&evm_3v3_sw>;
85 regulator-min-microvolt = <1800000>;
86 regulator-max-microvolt = <1800000>;
89 evm_3v3_sd: fixedregulator-sd {
90 compatible = "regulator-fixed";
91 regulator-name = "evm_3v3_sd";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 vin-supply = <&evm_3v3_sw>;
95 enable-active-high;
100 compatible = "linux,extcon-usb-gpio";
101 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
105 compatible = "linux,extcon-usb-gpio";
106 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
110 compatible = "hdmi-connector";
117 remote-endpoint = <&tpd12s015_out>;
130 #address-cells = <1>;
131 #size-cells = <0>;
137 remote-endpoint = <&hdmi_out>;
145 remote-endpoint = <&hdmi_connector_in>;
152 compatible = "simple-audio-card";
153 simple-audio-card,name = "DRA7xx-EVM";
154 simple-audio-card,widgets =
159 simple-audio-card,routing =
169 simple-audio-card,format = "dsp_b";
170 simple-audio-card,bitclock-master = <&sound0_master>;
171 simple-audio-card,frame-master = <&sound0_master>;
172 simple-audio-card,bitclock-inversion;
174 sound0_master: simple-audio-card,cpu {
175 sound-dai = <&mcasp3>;
176 system-clock-frequency = <5644800>;
179 simple-audio-card,codec {
180 sound-dai = <&tlv320aic3106>;
185 vmmcwl_fixed: fixedregulator-mmcwl {
186 compatible = "regulator-fixed";
187 regulator-name = "vmmcwl_fixed";
188 regulator-min-microvolt = <1800000>;
189 regulator-max-microvolt = <1800000>;
191 enable-active-high;
197 pinctrl-single,pins = <
204 pinctrl-single,pins = <
213 clock-frequency = <400000>;
218 gpio-controller;
219 #gpio-cells = <2>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
227 lines-initial-states = <0x1408>;
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
235 #sound-dai-cells = <0>;
238 adc-settle-ms = <40>;
239 ai3x-micbias-vg = <1>; /* 2.0V */
243 AVDD-supply = <&evm_3v3_sw>;
244 IOVDD-supply = <&evm_3v3_sw>;
245 DRVDD-supply = <&evm_3v3_sw>;
246 DVDD-supply = <&aic_dvdd>;
252 clock-frequency = <400000>;
257 gpio-controller;
258 #gpio-cells = <2>;
265 lines-initial-states = <0x0f2b>;
269 gpio-hog;
271 output-low;
272 line-name = "vin6_sel_s0";
279 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
289 * For the existing IOdelay configuration via U-Boot we don't
290 * support NAND on dra72-evm. Keep it disabled. Enabling it
291 * requires a different configuration by U-Boot.
300 compatible = "ti,omap2-nand";
302 interrupt-parent = <&gpmc>;
305 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
306 ti,nand-xfer-type = "prefetch-dma";
307 ti,nand-ecc-opt = "bch8";
308 ti,elm-id = <&elm>;
309 nand-bus-width = <16>;
310 gpmc,device-width = <2>;
311 gpmc,sync-clk-ps = <0>;
312 gpmc,cs-on-ns = <0>;
313 gpmc,cs-rd-off-ns = <80>;
314 gpmc,cs-wr-off-ns = <80>;
315 gpmc,adv-on-ns = <0>;
316 gpmc,adv-rd-off-ns = <60>;
317 gpmc,adv-wr-off-ns = <60>;
318 gpmc,we-on-ns = <10>;
319 gpmc,we-off-ns = <50>;
320 gpmc,oe-on-ns = <4>;
321 gpmc,oe-off-ns = <40>;
322 gpmc,access-ns = <40>;
323 gpmc,wr-access-ns = <80>;
324 gpmc,rd-cycle-ns = <80>;
325 gpmc,wr-cycle-ns = <80>;
326 gpmc,bus-turnaround-ns = <0>;
327 gpmc,cycle2cycle-delay-ns = <0>;
328 gpmc,clk-activation-ns = <0>;
329 gpmc,wr-data-mux-bus-ns = <0>;
331 /* All SPL-* partitions are sized to minimal length
333 * NAND flash this is equal to size of erase-block */
334 #address-cells = <1>;
335 #size-cells = <1>;
353 label = "NAND.u-boot-spl-os";
357 label = "NAND.u-boot";
361 label = "NAND.u-boot-env";
365 label = "NAND.u-boot-env.backup1";
373 label = "NAND.file-system";
399 pinctrl-names = "default";
400 pinctrl-0 = <&mmc1_pins_default>;
401 vmmc-supply = <&evm_3v3_sd>;
402 bus-width = <4>;
404 * SDCD signal is not being used here - using the fact that GPIO mode
407 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
408 max-frequency = <192000000>;
412 /* SW5-3 in ON position */
414 pinctrl-names = "default";
415 pinctrl-0 = <&mmc2_pins_default>;
416 bus-width = <8>;
417 non-removable;
418 max-frequency = <192000000>;
423 vmmc-supply = <&evm_3v6>;
424 vqmmc-supply = <&vmmcwl_fixed>;
425 bus-width = <4>;
426 cap-power-off-card;
427 keep-power-in-suspend;
428 non-removable;
429 pinctrl-names = "default", "hs", "sdr12", "sdr25";
430 pinctrl-0 = <&mmc4_pins_default>;
431 pinctrl-1 = <&mmc4_pins_default>;
432 pinctrl-2 = <&mmc4_pins_default>;
433 pinctrl-3 = <&mmc4_pins_default>;
434 #address-cells = <1>;
435 #size-cells = <0>;
439 interrupt-parent = <&gpio5>;
450 pinctrl-names = "default", "sleep", "active";
451 pinctrl-0 = <&dcan1_pins_sleep>;
452 pinctrl-1 = <&dcan1_pins_sleep>;
453 pinctrl-2 = <&dcan1_pins_default>;
459 spi-max-frequency = <76800000>;
462 spi-max-frequency = <76800000>;
464 spi-tx-bus-width = <1>;
465 spi-rx-bus-width = <4>;
466 #address-cells = <1>;
467 #size-cells = <1>;
491 label = "QSPI.u-boot";
495 label = "QSPI.u-boot-spl-os";
499 label = "QSPI.u-boot-env";
503 label = "QSPI.u-boot-env.backup1";
511 label = "QSPI.file-system";
526 remote-endpoint = <&tpd12s015_in>;
532 assigned-clocks = <&abe_dpll_sys_clk_mux>,
537 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
538 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
549 #sound-dai-cells = <0>;
551 assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
552 assigned-clock-parents = <&atl_clkin2_ck>;
556 op-mode = <0>; /* MCASP_IIS_MODE */
557 tdm-slots = <2>;
559 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
562 tx-num-evt = <32>;
563 rx-num-evt = <32>;