Lines Matching +full:imx51 +full:- +full:uart
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx7d-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
18 * pre-existing /chosen node to be available to insert the
52 #address-cells = <1>;
53 #size-cells = <0>;
56 compatible = "arm,cortex-a7";
59 clock-frequency = <792000000>;
60 clock-latency = <61036>; /* two CLK32 periods */
65 ckil: clock-cki {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <32768>;
69 clock-output-names = "ckil";
72 osc: clock-osc {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 clock-frequency = <24000000>;
76 clock-output-names = "osc";
80 compatible = "usb-nop-xceiv";
82 clock-names = "main_clk";
83 #phy-cells = <0>;
87 compatible = "usb-nop-xceiv";
89 clock-names = "main_clk";
90 #phy-cells = <0>;
94 compatible = "arm,cortex-a7-pmu";
95 interrupt-parent = <&gpc>;
97 interrupt-affinity = <&cpu0>;
102 * non-configurable replicators don't show up on the
105 compatible = "arm,coresight-replicator";
108 #address-cells = <1>;
109 #size-cells = <0>;
114 remote-endpoint = <&tpiu_in_port>;
121 remote-endpoint = <&etr_in_port>;
129 slave-mode;
130 remote-endpoint = <&etf_out_port>;
137 compatible = "fsl,imx7d-tempmon";
138 interrupt-parent = <&gpc>;
141 nvmem-cells = <&tempmon_calib>,
143 nvmem-cell-names = "calib", "temp_grade";
148 compatible = "arm,armv7-timer";
149 interrupt-parent = <&intc>;
157 #address-cells = <1>;
158 #size-cells = <1>;
159 compatible = "simple-bus";
160 interrupt-parent = <&gpc>;
164 compatible = "arm,coresight-funnel", "arm,primecell";
167 clock-names = "apb_pclk";
170 #address-cells = <1>;
171 #size-cells = <0>;
177 slave-mode;
178 remote-endpoint = <&etm0_out_port>;
186 remote-endpoint = <&hugo_funnel_in_port0>;
195 compatible = "arm,coresight-etm3x", "arm,primecell";
199 clock-names = "apb_pclk";
203 remote-endpoint = <&ca_funnel_in_port0>;
209 compatible = "arm,coresight-funnel", "arm,primecell";
212 clock-names = "apb_pclk";
215 #address-cells = <1>;
216 #size-cells = <0>;
222 slave-mode;
223 remote-endpoint = <&ca_funnel_out_port0>;
230 slave-mode; /* M4 input */
237 remote-endpoint = <&etf_in_port>;
246 compatible = "arm,coresight-tmc", "arm,primecell";
249 clock-names = "apb_pclk";
252 #address-cells = <1>;
253 #size-cells = <0>;
258 slave-mode;
259 remote-endpoint = <&hugo_funnel_out_port0>;
266 remote-endpoint = <&replicator_in_port0>;
273 compatible = "arm,coresight-tmc", "arm,primecell";
276 clock-names = "apb_pclk";
280 slave-mode;
281 remote-endpoint = <&replicator_out_port1>;
287 compatible = "arm,coresight-tpiu", "arm,primecell";
290 clock-names = "apb_pclk";
294 slave-mode;
295 remote-endpoint = <&replicator_out_port0>;
300 intc: interrupt-controller@31001000 {
301 compatible = "arm,cortex-a7-gic";
303 #interrupt-cells = <3>;
304 interrupt-controller;
305 interrupt-parent = <&intc>;
312 aips1: aips-bus@30000000 {
313 compatible = "fsl,aips-bus", "simple-bus";
314 #address-cells = <1>;
315 #size-cells = <1>;
320 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
324 gpio-controller;
325 #gpio-cells = <2>;
326 interrupt-controller;
327 #interrupt-cells = <2>;
328 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
332 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
336 gpio-controller;
337 #gpio-cells = <2>;
338 interrupt-controller;
339 #interrupt-cells = <2>;
340 gpio-ranges = <&iomuxc 0 13 32>;
344 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
348 gpio-controller;
349 #gpio-cells = <2>;
350 interrupt-controller;
351 #interrupt-cells = <2>;
352 gpio-ranges = <&iomuxc 0 45 29>;
356 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
360 gpio-controller;
361 #gpio-cells = <2>;
362 interrupt-controller;
363 #interrupt-cells = <2>;
364 gpio-ranges = <&iomuxc 0 74 24>;
368 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
372 gpio-controller;
373 #gpio-cells = <2>;
374 interrupt-controller;
375 #interrupt-cells = <2>;
376 gpio-ranges = <&iomuxc 0 98 18>;
380 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
384 gpio-controller;
385 #gpio-cells = <2>;
386 interrupt-controller;
387 #interrupt-cells = <2>;
388 gpio-ranges = <&iomuxc 0 116 23>;
392 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
396 gpio-controller;
397 #gpio-cells = <2>;
398 interrupt-controller;
399 #interrupt-cells = <2>;
400 gpio-ranges = <&iomuxc 0 139 16>;
404 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
411 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
419 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
427 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
434 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
435 compatible = "fsl,imx7d-iomuxc-lpsr";
437 fsl,input-sel = <&iomuxc>;
441 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
446 clock-names = "ipg", "per";
450 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
455 clock-names = "ipg", "per";
460 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
465 clock-names = "ipg", "per";
470 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
475 clock-names = "ipg", "per";
480 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
488 compatible = "fsl,imx7d-iomuxc";
492 gpr: iomuxc-gpr@30340000 {
493 compatible = "fsl,imx7d-iomuxc-gpr",
494 "fsl,imx6q-iomuxc-gpr", "syscon";
498 ocotp: ocotp-ctrl@30350000 {
499 #address-cells = <1>;
500 #size-cells = <1>;
501 compatible = "fsl,imx7d-ocotp", "syscon";
509 tempmon_temp_grade: temp-grade@10 {
515 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
516 "syscon", "simple-bus";
521 reg_1p0d: regulator-vdd1p0d {
522 compatible = "fsl,anatop-regulator";
523 regulator-name = "vdd1p0d";
524 regulator-min-microvolt = <800000>;
525 regulator-max-microvolt = <1200000>;
526 anatop-reg-offset = <0x210>;
527 anatop-vol-bit-shift = <8>;
528 anatop-vol-bit-width = <5>;
529 anatop-min-bit-val = <8>;
530 anatop-min-voltage = <800000>;
531 anatop-max-voltage = <1200000>;
532 anatop-enable-bit = <0>;
535 reg_1p2: regulator-vdd1p2 {
536 compatible = "fsl,anatop-regulator";
537 regulator-name = "vdd1p2";
538 regulator-min-microvolt = <1100000>;
539 regulator-max-microvolt = <1300000>;
540 anatop-reg-offset = <0x220>;
541 anatop-vol-bit-shift = <8>;
542 anatop-vol-bit-width = <5>;
543 anatop-min-bit-val = <0x14>;
544 anatop-min-voltage = <1100000>;
545 anatop-max-voltage = <1300000>;
546 anatop-enable-bit = <0>;
551 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
554 snvs_rtc: snvs-rtc-lp {
555 compatible = "fsl,sec-v4.0-mon-rtc-lp";
561 clock-names = "snvs-rtc";
564 snvs_poweroff: snvs-poweroff {
565 compatible = "syscon-poweroff";
572 snvs_pwrkey: snvs-powerkey {
573 compatible = "fsl,sec-v4.0-pwrkey";
577 wakeup-source;
582 compatible = "fsl,imx7d-ccm";
586 #clock-cells = <1>;
588 clock-names = "ckil", "osc";
592 compatible = "fsl,imx7d-src", "syscon";
595 #reset-cells = <1>;
599 compatible = "fsl,imx7d-gpc";
601 interrupt-controller;
603 #interrupt-cells = <3>;
604 interrupt-parent = <&intc>;
605 #power-domain-cells = <1>;
608 #address-cells = <1>;
609 #size-cells = <0>;
611 pgc_pcie_phy: pgc-power-domain@1 {
612 #power-domain-cells = <0>;
614 power-supply = <®_1p0d>;
620 aips2: aips-bus@30400000 {
621 compatible = "fsl,aips-bus", "simple-bus";
622 #address-cells = <1>;
623 #size-cells = <1>;
628 compatible = "fsl,imx7d-adc";
632 clock-names = "adc";
637 compatible = "fsl,imx7d-adc";
641 clock-names = "adc";
646 #address-cells = <1>;
647 #size-cells = <0>;
648 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
653 clock-names = "ipg", "per";
658 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
663 clock-names = "ipg", "per";
664 #pwm-cells = <3>;
669 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
674 clock-names = "ipg", "per";
675 #pwm-cells = <3>;
680 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
685 clock-names = "ipg", "per";
686 #pwm-cells = <3>;
691 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
696 clock-names = "ipg", "per";
697 #pwm-cells = <3>;
702 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
707 clock-names = "pix", "axi";
712 aips3: aips-bus@30800000 {
713 compatible = "fsl,aips-bus", "simple-bus";
714 #address-cells = <1>;
715 #size-cells = <1>;
719 spba-bus@30800000 {
720 compatible = "fsl,spba-bus", "simple-bus";
721 #address-cells = <1>;
722 #size-cells = <1>;
727 #address-cells = <1>;
728 #size-cells = <0>;
729 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
734 clock-names = "ipg", "per";
739 #address-cells = <1>;
740 #size-cells = <0>;
741 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
746 clock-names = "ipg", "per";
751 #address-cells = <1>;
752 #size-cells = <0>;
753 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
758 clock-names = "ipg", "per";
763 compatible = "fsl,imx7d-uart",
764 "fsl,imx6q-uart";
769 clock-names = "ipg", "per";
774 compatible = "fsl,imx7d-uart",
775 "fsl,imx6q-uart";
780 clock-names = "ipg", "per";
785 compatible = "fsl,imx7d-uart",
786 "fsl,imx6q-uart";
791 clock-names = "ipg", "per";
796 #sound-dai-cells = <0>;
797 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
804 clock-names = "bus", "mclk1", "mclk2", "mclk3";
805 dma-names = "rx", "tx";
811 #sound-dai-cells = <0>;
812 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
819 clock-names = "bus", "mclk1", "mclk2", "mclk3";
820 dma-names = "rx", "tx";
826 #sound-dai-cells = <0>;
827 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
834 clock-names = "bus", "mclk1", "mclk2", "mclk3";
835 dma-names = "rx", "tx";
842 compatible = "fsl,sec-v4.0";
843 #address-cells = <1>;
844 #size-cells = <1>;
850 clock-names = "ipg", "aclk";
853 compatible = "fsl,sec-v4.0-job-ring";
859 compatible = "fsl,sec-v4.0-job-ring";
865 compatible = "fsl,sec-v4.0-job-ring";
872 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
877 clock-names = "ipg", "per";
882 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
887 clock-names = "ipg", "per";
892 #address-cells = <1>;
893 #size-cells = <0>;
894 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
902 #address-cells = <1>;
903 #size-cells = <0>;
904 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
912 #address-cells = <1>;
913 #size-cells = <0>;
914 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
922 #address-cells = <1>;
923 #size-cells = <0>;
924 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
932 compatible = "fsl,imx7d-uart",
933 "fsl,imx6q-uart";
938 clock-names = "ipg", "per";
943 compatible = "fsl,imx7d-uart",
944 "fsl,imx6q-uart";
949 clock-names = "ipg", "per";
954 compatible = "fsl,imx7d-uart",
955 "fsl,imx6q-uart";
960 clock-names = "ipg", "per";
965 compatible = "fsl,imx7d-uart",
966 "fsl,imx6q-uart";
971 clock-names = "ipg", "per";
976 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
982 phy-clkgate-delay-us = <400>;
987 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
995 phy-clkgate-delay-us = <400>;
1000 #index-cells = <1>;
1001 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1006 #index-cells = <1>;
1007 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1012 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1018 clock-names = "ipg", "ahb", "per";
1019 bus-width = <4>;
1024 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1030 clock-names = "ipg", "ahb", "per";
1031 bus-width = <4>;
1036 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1042 clock-names = "ipg", "ahb", "per";
1043 bus-width = <4>;
1048 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1053 clock-names = "ipg", "ahb";
1054 #dma-cells = <3>;
1055 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1059 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1061 interrupt-names = "int0", "int1", "int2", "pps";
1071 clock-names = "ipg", "ahb", "ptp",
1073 fsl,num-tx-queues=<3>;
1074 fsl,num-rx-queues=<3>;
1079 dma_apbh: dma-apbh@33000000 {
1080 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1086 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1087 #dma-cells = <1>;
1088 dma-channels = <4>;
1092 gpmi: gpmi-nand@33002000{
1093 compatible = "fsl,imx7d-gpmi-nand";
1094 #address-cells = <1>;
1095 #size-cells = <1>;
1097 reg-names = "gpmi-nand", "bch";
1099 interrupt-names = "bch";
1102 clock-names = "gpmi_io", "gpmi_bch_apb";
1104 dma-names = "rx-tx";
1106 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1107 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;