Lines Matching +full:mmp +full:- +full:timer

11 #include <dt-bindings/clock/marvell,mmp2.h>
24 		#address-cells = <1>;
25 		#size-cells = <1>;
26 		compatible = "simple-bus";
27 		interrupt-parent = <&intc>;
30 		L2: l2-cache {
31 			compatible = "marvell,tauros2-cache";
32 			marvell,tauros2-cache-features = <0x3>;
36 			compatible = "mrvl,axi-bus", "simple-bus";
37 			#address-cells = <1>;
38 			#size-cells = <1>;
42 			intc: interrupt-controller@d4282000 {
43 				compatible = "mrvl,mmp2-intc";
44 				interrupt-controller;
45 				#interrupt-cells = <1>;
47 				mrvl,intc-nr-irqs = <64>;
50 			intcmux4: interrupt-controller@d4282150 {
51 				compatible = "mrvl,mmp2-mux-intc";
53 				interrupt-controller;
54 				#interrupt-cells = <1>;
56 				reg-names = "mux status", "mux mask";
57 				mrvl,intc-nr-irqs = <2>;
60 			intcmux5: interrupt-controller@d4282154 {
61 				compatible = "mrvl,mmp2-mux-intc";
63 				interrupt-controller;
64 				#interrupt-cells = <1>;
66 				reg-names = "mux status", "mux mask";
67 				mrvl,intc-nr-irqs = <2>;
68 				mrvl,clr-mfp-irq = <1>;
71 			intcmux9: interrupt-controller@d4282180 {
72 				compatible = "mrvl,mmp2-mux-intc";
74 				interrupt-controller;
75 				#interrupt-cells = <1>;
77 				reg-names = "mux status", "mux mask";
78 				mrvl,intc-nr-irqs = <3>;
81 			intcmux17: interrupt-controller@d4282158 {
82 				compatible = "mrvl,mmp2-mux-intc";
84 				interrupt-controller;
85 				#interrupt-cells = <1>;
87 				reg-names = "mux status", "mux mask";
88 				mrvl,intc-nr-irqs = <5>;
91 			intcmux35: interrupt-controller@d428215c {
92 				compatible = "mrvl,mmp2-mux-intc";
94 				interrupt-controller;
95 				#interrupt-cells = <1>;
97 				reg-names = "mux status", "mux mask";
98 				mrvl,intc-nr-irqs = <15>;
101 			intcmux51: interrupt-controller@d4282160 {
102 				compatible = "mrvl,mmp2-mux-intc";
104 				interrupt-controller;
105 				#interrupt-cells = <1>;
107 				reg-names = "mux status", "mux mask";
108 				mrvl,intc-nr-irqs = <2>;
111 			intcmux55: interrupt-controller@d4282188 {
112 				compatible = "mrvl,mmp2-mux-intc";
114 				interrupt-controller;
115 				#interrupt-cells = <1>;
117 				reg-names = "mux status", "mux mask";
118 				mrvl,intc-nr-irqs = <2>;
123 			compatible = "mrvl,apb-bus", "simple-bus";
124 			#address-cells = <1>;
125 			#size-cells = <1>;
129 			timer0: timer@d4014000 {
130 				compatible = "mrvl,mmp-timer";
136 				compatible = "mrvl,mmp-uart";
145 				compatible = "mrvl,mmp-uart";
154 				compatible = "mrvl,mmp-uart";
163 				compatible = "mrvl,mmp-uart";
172 				compatible = "marvell,mmp2-gpio";
173 				#address-cells = <1>;
174 				#size-cells = <1>;
176 				gpio-controller;
177 				#gpio-cells = <2>;
179 				interrupt-names = "gpio_mux";
182 				interrupt-controller;
183 				#interrupt-cells = <2>;
212 				compatible = "mrvl,mmp-twsi";
217 				#address-cells = <1>;
218 				#size-cells = <0>;
219 				mrvl,i2c-fast-mode;
224 				compatible = "mrvl,mmp-twsi";
226 				interrupt-parent = <&intcmux17>;
230 				#address-cells = <1>;
231 				#size-cells = <0>;
236 				compatible = "mrvl,mmp-rtc";
239 				interrupt-names = "rtc 1Hz", "rtc alarm";
240 				interrupt-parent = <&intcmux5>;
248 			compatible = "marvell,mmp2-clock";
252 			reg-names = "mpmu", "apmu", "apbc";
253 			#clock-cells = <1>;
254 			#reset-cells = <1>;