Lines Matching +full:qcom +full:- +full:tsens
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
7 #include <dt-bindings/gpio/gpio.h>
11 compatible = "qcom,apq8084";
12 interrupt-parent = <&intc>;
14 reserved-memory {
15 #address-cells = <1>;
16 #size-cells = <1>;
21 no-map;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "qcom,krait";
33 enable-method = "qcom,kpss-acc-v2";
34 next-level-cache = <&L2>;
35 qcom,acc = <&acc0>;
36 qcom,saw = <&saw0>;
37 cpu-idle-states = <&CPU_SPC>;
42 compatible = "qcom,krait";
44 enable-method = "qcom,kpss-acc-v2";
45 next-level-cache = <&L2>;
46 qcom,acc = <&acc1>;
47 qcom,saw = <&saw1>;
48 cpu-idle-states = <&CPU_SPC>;
53 compatible = "qcom,krait";
55 enable-method = "qcom,kpss-acc-v2";
56 next-level-cache = <&L2>;
57 qcom,acc = <&acc2>;
58 qcom,saw = <&saw2>;
59 cpu-idle-states = <&CPU_SPC>;
64 compatible = "qcom,krait";
66 enable-method = "qcom,kpss-acc-v2";
67 next-level-cache = <&L2>;
68 qcom,acc = <&acc3>;
69 qcom,saw = <&saw3>;
70 cpu-idle-states = <&CPU_SPC>;
73 L2: l2-cache {
74 compatible = "qcom,arch-cache";
75 cache-level = <2>;
76 qcom,saw = <&saw_l2>;
79 idle-states {
81 compatible = "qcom,idle-state-spc",
82 "arm,idle-state";
83 entry-latency-us = <150>;
84 exit-latency-us = <200>;
85 min-residency-us = <2000>;
92 compatible = "qcom,scm";
94 clock-names = "core", "bus", "iface";
98 thermal-zones {
99 cpu-thermal0 {
100 polling-delay-passive = <250>;
101 polling-delay = <1000>;
103 thermal-sensors = <&tsens 5>;
119 cpu-thermal1 {
120 polling-delay-passive = <250>;
121 polling-delay = <1000>;
123 thermal-sensors = <&tsens 6>;
139 cpu-thermal2 {
140 polling-delay-passive = <250>;
141 polling-delay = <1000>;
143 thermal-sensors = <&tsens 7>;
159 cpu-thermal3 {
160 polling-delay-passive = <250>;
161 polling-delay = <1000>;
163 thermal-sensors = <&tsens 8>;
180 cpu-pmu {
181 compatible = "qcom,krait-pmu";
187 compatible = "fixed-clock";
188 #clock-cells = <0>;
189 clock-frequency = <19200000>;
193 compatible = "fixed-clock";
194 #clock-cells = <0>;
195 clock-frequency = <32768>;
200 compatible = "arm,armv7-timer";
205 clock-frequency = <19200000>;
209 compatible = "qcom,smem";
211 qcom,rpm-msg-ram = <&rpm_msg_ram>;
212 memory-region = <&smem_mem>;
218 #address-cells = <1>;
219 #size-cells = <1>;
221 compatible = "simple-bus";
223 intc: interrupt-controller@f9000000 {
224 compatible = "qcom,msm-qgic2";
225 interrupt-controller;
226 #interrupt-cells = <3>;
237 #address-cells = <1>;
238 #size-cells = <1>;
239 compatible = "qcom,qfprom";
249 tsens: thermal-sensor@fc4a8000 { label
250 compatible = "qcom,msm8974-tsens";
252 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
253 nvmem-cell-names = "calib", "calib_backup";
254 #thermal-sensor-cells = <1>;
258 #address-cells = <1>;
259 #size-cells = <1>;
261 compatible = "arm,armv7-timer-mem";
263 clock-frequency = <19200000>;
266 frame-number = <0>;
274 frame-number = <1>;
281 frame-number = <2>;
288 frame-number = <3>;
295 frame-number = <4>;
302 frame-number = <5>;
309 frame-number = <6>;
316 saw0: power-controller@f9089000 {
317 compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
321 saw1: power-controller@f9099000 {
322 compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
326 saw2: power-controller@f90a9000 {
327 compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
331 saw3: power-controller@f90b9000 {
332 compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
336 saw_l2: power-controller@f9012000 {
337 compatible = "qcom,saw2";
342 acc0: clock-controller@f9088000 {
343 compatible = "qcom,kpss-acc-v2";
348 acc1: clock-controller@f9098000 {
349 compatible = "qcom,kpss-acc-v2";
354 acc2: clock-controller@f90a8000 {
355 compatible = "qcom,kpss-acc-v2";
360 acc3: clock-controller@f90b8000 {
361 compatible = "qcom,kpss-acc-v2";
367 compatible = "qcom,pshold";
371 gcc: clock-controller@fc400000 {
372 compatible = "qcom,gcc-apq8084";
373 #clock-cells = <1>;
374 #reset-cells = <1>;
375 #power-domain-cells = <1>;
385 compatible = "qcom,tcsr-mutex";
387 #hwlock-cells = <1>;
391 compatible = "qcom,rpm-msg-ram";
396 compatible = "qcom,apq8084-pinctrl";
398 gpio-controller;
399 #gpio-cells = <2>;
400 interrupt-controller;
401 #interrupt-cells = <2>;
406 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
410 clock-names = "core", "iface";
415 compatible = "qcom,sdhci-msm-v4";
417 reg-names = "hc_mem", "core_mem";
419 interrupt-names = "hc_irq", "pwr_irq";
423 clock-names = "core", "iface", "xo";
428 compatible = "qcom,sdhci-msm-v4";
430 reg-names = "hc_mem", "core_mem";
432 interrupt-names = "hc_irq", "pwr_irq";
436 clock-names = "core", "iface", "xo";
441 compatible = "qcom,spmi-pmic-arb";
442 reg-names = "core", "intr", "cnfg";
446 interrupt-names = "periph_irq";
448 qcom,ee = <0>;
449 qcom,channel = <0>;
450 #address-cells = <2>;
451 #size-cells = <0>;
452 interrupt-controller;
453 #interrupt-cells = <4>;
458 compatible = "qcom,smd";
462 qcom,ipc = <&apcs 8 0>;
463 qcom,smd-edge = <15>;
466 compatible = "qcom,rpm-apq8084";
467 qcom,smd-channels = "rpm_requests";
469 pma8084-regulators {
470 compatible = "qcom,rpm-pma8084-regulators";