Lines Matching +full:kpss +full:- +full:acc
14 /dts-v1/;
17 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
18 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&intc>;
26 reserved-memory {
27 #address-cells = <0x1>;
28 #size-cells = <0x1>;
33 no-map;
38 no-map;
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a7";
55 enable-method = "qcom,kpss-acc-v1";
56 qcom,acc = <&acc0>;
60 clock-frequency = <0>;
61 operating-points = <
68 clock-latency = <256000>;
73 compatible = "arm,cortex-a7";
74 enable-method = "qcom,kpss-acc-v1";
75 qcom,acc = <&acc1>;
79 clock-frequency = <0>;
80 operating-points = <
87 clock-latency = <256000>;
92 compatible = "arm,cortex-a7";
93 enable-method = "qcom,kpss-acc-v1";
94 qcom,acc = <&acc2>;
98 clock-frequency = <0>;
99 operating-points = <
106 clock-latency = <256000>;
111 compatible = "arm,cortex-a7";
112 enable-method = "qcom,kpss-acc-v1";
113 qcom,acc = <&acc3>;
117 clock-frequency = <0>;
118 operating-points = <
125 clock-latency = <256000>;
130 compatible = "arm,cortex-a7-pmu";
137 compatible = "fixed-clock";
138 clock-frequency = <32768>;
139 #clock-cells = <0>;
143 compatible = "fixed-clock";
144 clock-frequency = <48000000>;
145 #clock-cells = <0>;
151 compatible = "qcom,scm-ipq4019";
156 compatible = "arm,armv7-timer";
161 clock-frequency = <48000000>;
165 #address-cells = <1>;
166 #size-cells = <1>;
168 compatible = "simple-bus";
170 intc: interrupt-controller@b000000 {
171 compatible = "qcom,msm-qgic2";
172 interrupt-controller;
173 #interrupt-cells = <3>;
178 gcc: clock-controller@1800000 {
179 compatible = "qcom,gcc-ipq4019";
180 #clock-cells = <1>;
181 #reset-cells = <1>;
189 clock-names = "core";
194 compatible = "qcom,ipq4019-pinctrl";
196 gpio-controller;
197 #gpio-cells = <2>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
204 compatible = "qcom,bam-v1.7.0";
208 clock-names = "bam_clk";
209 #dma-cells = <1>;
215 compatible = "qcom,spi-qup-v2.2.1";
220 clock-names = "core", "iface";
221 #address-cells = <1>;
222 #size-cells = <0>;
224 dma-names = "rx", "tx";
229 compatible = "qcom,spi-qup-v2.2.1";
234 clock-names = "core", "iface";
235 #address-cells = <1>;
236 #size-cells = <0>;
238 dma-names = "rx", "tx";
243 compatible = "qcom,i2c-qup-v2.2.1";
248 clock-names = "iface", "core";
249 #address-cells = <1>;
250 #size-cells = <0>;
252 dma-names = "rx", "tx";
257 compatible = "qcom,i2c-qup-v2.2.1";
262 clock-names = "iface", "core";
263 #address-cells = <1>;
264 #size-cells = <0>;
266 dma-names = "rx", "tx";
271 compatible = "qcom,bam-v1.7.0";
275 clock-names = "bam_clk";
276 #dma-cells = <1>;
278 qcom,controlled-remotely;
283 compatible = "qcom,crypto-v5.1";
288 clock-names = "iface", "bus", "core";
290 dma-names = "rx", "tx";
294 acc0: clock-controller@b088000 {
295 compatible = "qcom,kpss-acc-v1";
299 acc1: clock-controller@b098000 {
300 compatible = "qcom,kpss-acc-v1";
304 acc2: clock-controller@b0a8000 {
305 compatible = "qcom,kpss-acc-v1";
309 acc3: clock-controller@b0b8000 {
310 compatible = "qcom,kpss-acc-v1";
339 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
345 clock-names = "core", "iface";
347 dma-names = "rx", "tx";
351 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
357 clock-names = "core", "iface";
359 dma-names = "rx", "tx";
363 compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019";
366 timeout-sec = <10>;
376 compatible = "qcom,pcie-ipq4019", "snps,dw-pcie";
381 reg-names = "dbi", "elbi", "parf", "config";
383 linux,pci-domain = <0>;
384 bus-range = <0x00 0xff>;
385 num-lanes = <1>;
386 #address-cells = <3>;
387 #size-cells = <2>;
393 interrupt-names = "msi";
394 #interrupt-cells = <1>;
395 interrupt-map-mask = <0 0 0 0x7>;
396 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
403 clock-names = "aux",
419 reset-names = "axi_m",
436 compatible = "qcom,bam-v1.7.0";
440 clock-names = "bam_clk";
441 #dma-cells = <1>;
446 nand: qpic-nand@79b0000 {
447 compatible = "qcom,ipq4019-nand";
449 #address-cells = <1>;
450 #size-cells = <0>;
453 clock-names = "core", "aon";
458 dma-names = "tx", "rx", "cmd";
464 nand-ecc-strength = <4>;
465 nand-ecc-step-size = <512>;
466 nand-bus-width = <8>;
471 compatible = "qcom,ipq4019-wifi";
479 reset-names = "wifi_cpu_init", "wifi_radio_srif",
485 clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
504 interrupt-names = "msi0", "msi1", "msi2", "msi3",
513 compatible = "qcom,ipq4019-wifi";
521 reset-names = "wifi_cpu_init", "wifi_radio_srif",
527 clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
546 interrupt-names = "msi0", "msi1", "msi2", "msi3",