Lines Matching +full:0 +full:x304
18 #size-cells = <0>;
19 interrupts = <1 14 0x304>;
21 cpu@0 {
25 reg = <0>;
49 interrupts = <1 10 0x304>;
56 #clock-cells = <0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
86 reg = <0x02000000 0x1000>,
87 <0x02002000 0x1000>;
93 interrupts = <1 1 0x301>,
94 <1 2 0x301>,
95 <1 3 0x301>;
96 reg = <0x0200a000 0x100>;
99 cpu-offset = <0x80000>;
106 interrupts = <0 16 0x4>;
109 reg = <0x800000 0x4000>;
116 reg = <0x900000 0x4000>;
121 reg = <0x28000000 0x1000>;
128 reg = <0x4000000 0x1000>;
135 reg = <0x2011000 0x1000>;
140 reg = <0x108000 0x1000>;
141 qcom,ipc = <&l2cc 0x8 2>;
143 interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
153 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
158 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
163 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
169 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
176 reg = <0x16400000 0x100>;
187 reg = <0x16440000 0x1000>,
188 <0x16400000 0x1000>;
189 interrupts = <0 154 0x0>;
198 reg = <0x500000 0x1000>;
201 pmicintc: pmic@0 {
208 #size-cells = <0>;
212 reg = <0x1c>;
221 reg = <0x148>;
233 reg = <0x11d>;
241 reg = <0x1a500000 0x200>;
263 arm,primecell-periphid = <0x00051180>;
264 reg = <0x12400000 0x8000>;
279 arm,primecell-periphid = <0x00051180>;
281 reg = <0x12180000 0x8000>;
297 reg = <0x1a400000 0x100>;
303 reg = <0x16000000 0x100>;
313 #size-cells = <0>;
314 reg = <0x16080000 0x1000>;
315 interrupts = <0 147 0>;
317 cs-gpios = <&msmgpio 8 0>;