Lines Matching +full:gcc +full:- +full:msm8960
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
8 #include <dt-bindings/mfd/qcom-rpm.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
12 model = "Qualcomm MSM8960";
13 compatible = "qcom,msm8960";
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <0>;
23 enable-method = "qcom,kpss-acc-v1";
26 next-level-cache = <&L2>;
33 enable-method = "qcom,kpss-acc-v1";
36 next-level-cache = <&L2>;
41 L2: l2-cache {
43 cache-level = <2>;
47 cpu-pmu {
48 compatible = "qcom,krait-pmu";
50 qcom,no-pc-write;
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <19200000>;
58 clock-output-names = "cxo_board";
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <27000000>;
65 clock-output-names = "pxo_board";
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <32768>;
72 clock-output-names = "sleep_clk";
77 #address-cells = <1>;
78 #size-cells = <1>;
80 compatible = "simple-bus";
82 intc: interrupt-controller@2000000 {
83 compatible = "qcom,msm-qgic2";
84 interrupt-controller;
85 #interrupt-cells = <3>;
91 compatible = "qcom,kpss-timer",
92 "qcom,kpss-wdt-msm8960", "qcom,msm-timer";
97 clock-frequency = <27000000>,
99 cpu-offset = <0x80000>;
103 compatible = "qcom,msm8960-pinctrl";
104 gpio-controller;
105 #gpio-cells = <2>;
107 interrupt-controller;
108 #interrupt-cells = <2>;
112 gcc: clock-controller@900000 { label
113 compatible = "qcom,gcc-msm8960";
114 #clock-cells = <1>;
115 #reset-cells = <1>;
119 lcc: clock-controller@28000000 {
120 compatible = "qcom,lcc-msm8960";
122 #clock-cells = <1>;
123 #reset-cells = <1>;
126 clock-controller@4000000 {
127 compatible = "qcom,mmcc-msm8960";
129 #clock-cells = <1>;
130 #reset-cells = <1>;
133 l2cc: clock-controller@2011000 {
139 compatible = "qcom,rpm-msm8960";
144 interrupt-names = "ack", "err", "wakeup";
147 compatible = "qcom,rpm-pm8921-regulators";
151 acc0: clock-controller@2088000 {
152 compatible = "qcom,kpss-acc-v1";
156 acc1: clock-controller@2098000 {
157 compatible = "qcom,kpss-acc-v1";
174 compatible = "qcom,gsbi-v1.0.0";
175 cell-index = <5>;
177 clocks = <&gcc GSBI5_H_CLK>;
178 clock-names = "iface";
179 #address-cells = <1>;
180 #size-cells = <1>;
183 syscon-tcsr = <&tcsr>;
186 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
190 clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
191 clock-names = "core", "iface";
199 qcom,controller-type = "pmic-arbiter";
203 interrupt-parent = <&msmgpio>;
205 #interrupt-cells = <2>;
206 interrupt-controller;
207 #address-cells = <1>;
208 #size-cells = <0>;
211 compatible = "qcom,pm8921-pwrkey";
213 interrupt-parent = <&pmicintc>;
216 pull-up;
220 compatible = "qcom,pm8921-keypad";
222 interrupt-parent = <&pmicintc>;
225 scan-delay = <32>;
226 row-hold = <91500>;
230 compatible = "qcom,pm8921-rtc";
231 interrupt-parent = <&pmicintc>;
234 allow-set-time;
242 clocks = <&gcc PRNG_CLK>;
243 clock-names = "core";
247 vsdcc_fixed: vsdcc-regulator {
248 compatible = "regulator-fixed";
249 regulator-name = "SDCC Power";
250 regulator-min-microvolt = <2700000>;
251 regulator-max-microvolt = <2700000>;
252 regulator-always-on;
256 compatible = "simple-bus";
257 #address-cells = <1>;
258 #size-cells = <1>;
263 arm,primecell-periphid = <0x00051180>;
266 interrupt-names = "cmd_irq";
267 clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
268 clock-names = "mclk", "apb_pclk";
269 bus-width = <8>;
270 max-frequency = <96000000>;
271 non-removable;
272 cap-sd-highspeed;
273 cap-mmc-highspeed;
274 vmmc-supply = <&vsdcc_fixed>;
279 arm,primecell-periphid = <0x00051180>;
283 interrupt-names = "cmd_irq";
284 clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
285 clock-names = "mclk", "apb_pclk";
286 bus-width = <4>;
287 cap-sd-highspeed;
288 cap-mmc-highspeed;
289 max-frequency = <192000000>;
290 no-1-8-v;
291 vmmc-supply = <&vsdcc_fixed>;
296 compatible = "qcom,tcsr-msm8960", "syscon";
301 compatible = "qcom,gsbi-v1.0.0";
302 cell-index = <1>;
304 clocks = <&gcc GSBI1_H_CLK>;
305 clock-names = "iface";
306 #address-cells = <1>;
307 #size-cells = <1>;
311 compatible = "qcom,spi-qup-v1.1.1";
312 #address-cells = <1>;
313 #size-cells = <0>;
316 spi-max-frequency = <24000000>;
317 cs-gpios = <&msmgpio 8 0>;
319 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
320 clock-names = "core", "iface";