Lines Matching +full:stm32 +full:- +full:timers
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
49 #include "armv7-m.dtsi"
50 #include <dt-bindings/clock/stm32fx-clock.h>
51 #include <dt-bindings/mfd/stm32f4-rcc.h>
55 clk_hse: clk-hse {
56 #clock-cells = <0>;
57 compatible = "fixed-clock";
58 clock-frequency = <0>;
61 clk-lse {
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
64 clock-frequency = <32768>;
67 clk_lsi: clk-lsi {
68 #clock-cells = <0>;
69 compatible = "fixed-clock";
70 clock-frequency = <32000>;
73 clk_i2s_ckin: i2s-ckin {
74 #clock-cells = <0>;
75 compatible = "fixed-clock";
76 clock-frequency = <0>;
82 compatible = "st,stm32-timer";
89 timers2: timers@40000000 {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "st,stm32-timers";
95 clock-names = "int";
99 compatible = "st,stm32-pwm";
104 compatible = "st,stm32-timer-trigger";
111 compatible = "st,stm32-timer";
118 timers3: timers@40000400 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "st,stm32-timers";
124 clock-names = "int";
128 compatible = "st,stm32-pwm";
133 compatible = "st,stm32-timer-trigger";
140 compatible = "st,stm32-timer";
147 timers4: timers@40000800 {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 compatible = "st,stm32-timers";
153 clock-names = "int";
157 compatible = "st,stm32-pwm";
162 compatible = "st,stm32-timer-trigger";
169 compatible = "st,stm32-timer";
175 timers5: timers@40000c00 {
176 #address-cells = <1>;
177 #size-cells = <0>;
178 compatible = "st,stm32-timers";
181 clock-names = "int";
185 compatible = "st,stm32-pwm";
190 compatible = "st,stm32-timer-trigger";
197 compatible = "st,stm32-timer";
204 timers6: timers@40001000 {
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "st,stm32-timers";
210 clock-names = "int";
214 compatible = "st,stm32-timer-trigger";
221 compatible = "st,stm32-timer";
228 timers7: timers@40001400 {
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "st,stm32-timers";
234 clock-names = "int";
238 compatible = "st,stm32-timer-trigger";
244 timers12: timers@40001800 {
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "st,stm32-timers";
250 clock-names = "int";
254 compatible = "st,stm32-pwm";
259 compatible = "st,stm32-timer-trigger";
265 timers13: timers@40001c00 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "st,stm32-timers";
271 clock-names = "int";
275 compatible = "st,stm32-pwm";
280 timers14: timers@40002000 {
281 #address-cells = <1>;
282 #size-cells = <0>;
283 compatible = "st,stm32-timers";
286 clock-names = "int";
290 compatible = "st,stm32-pwm";
296 compatible = "st,stm32-rtc";
299 clock-names = "ck_rtc";
300 assigned-clocks = <&rcc 1 CLK_RTC>;
301 assigned-clock-parents = <&rcc 1 CLK_LSE>;
302 interrupt-parent = <&exti>;
304 interrupt-names = "alarm";
310 compatible = "st,stm32-iwdg";
313 clock-names = "lsi";
318 compatible = "st,stm32-uart";
326 compatible = "st,stm32-uart";
333 dma-names = "rx", "tx";
337 compatible = "st,stm32-uart";
345 compatible = "st,stm32-uart";
353 compatible = "st,stm32f4-i2c";
359 #address-cells = <1>;
360 #size-cells = <0>;
365 compatible = "st,stm32f4-dac-core";
369 clock-names = "pclk";
370 #address-cells = <1>;
371 #size-cells = <0>;
375 compatible = "st,stm32-dac";
376 #io-channels-cells = <1>;
382 compatible = "st,stm32-dac";
383 #io-channels-cells = <1>;
390 compatible = "st,stm32-uart";
398 compatible = "st,stm32-uart";
405 timers1: timers@40010000 {
406 #address-cells = <1>;
407 #size-cells = <0>;
408 compatible = "st,stm32-timers";
411 clock-names = "int";
415 compatible = "st,stm32-pwm";
420 compatible = "st,stm32-timer-trigger";
426 timers8: timers@40010400 {
427 #address-cells = <1>;
428 #size-cells = <0>;
429 compatible = "st,stm32-timers";
432 clock-names = "int";
436 compatible = "st,stm32-pwm";
441 compatible = "st,stm32-timer-trigger";
448 compatible = "st,stm32-uart";
455 dma-names = "rx", "tx";
459 compatible = "st,stm32-uart";
467 compatible = "st,stm32f4-adc-core";
471 clock-names = "adc";
472 interrupt-controller;
473 #interrupt-cells = <1>;
474 #address-cells = <1>;
475 #size-cells = <0>;
479 compatible = "st,stm32f4-adc";
480 #io-channel-cells = <1>;
483 interrupt-parent = <&adc>;
486 dma-names = "rx";
491 compatible = "st,stm32f4-adc";
492 #io-channel-cells = <1>;
495 interrupt-parent = <&adc>;
498 dma-names = "rx";
503 compatible = "st,stm32f4-adc";
504 #io-channel-cells = <1>;
507 interrupt-parent = <&adc>;
510 dma-names = "rx";
517 arm,primecell-periphid = <0x00880180>;
520 clock-names = "apb_pclk";
522 max-frequency = <48000000>;
526 syscfg: system-config@40013800 {
531 exti: interrupt-controller@40013c00 {
532 compatible = "st,stm32-exti";
533 interrupt-controller;
534 #interrupt-cells = <2>;
539 timers9: timers@40014000 {
540 #address-cells = <1>;
541 #size-cells = <0>;
542 compatible = "st,stm32-timers";
545 clock-names = "int";
549 compatible = "st,stm32-pwm";
554 compatible = "st,stm32-timer-trigger";
560 timers10: timers@40014400 {
561 #address-cells = <1>;
562 #size-cells = <0>;
563 compatible = "st,stm32-timers";
566 clock-names = "int";
570 compatible = "st,stm32-pwm";
575 timers11: timers@40014800 {
576 #address-cells = <1>;
577 #size-cells = <0>;
578 compatible = "st,stm32-timers";
581 clock-names = "int";
585 compatible = "st,stm32-pwm";
590 pwrcfg: power-config@40007000 {
595 ltdc: display-controller@40016800 {
596 compatible = "st,stm32-ltdc";
601 clock-names = "lcd";
606 compatible = "st,stm32f4-crc";
613 #reset-cells = <1>;
614 #clock-cells = <2>;
615 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
619 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
620 assigned-clock-rates = <1000000>;
623 dma1: dma-controller@40026000 {
624 compatible = "st,stm32-dma";
635 #dma-cells = <4>;
638 dma2: dma-controller@40026400 {
639 compatible = "st,stm32-dma";
650 #dma-cells = <4>;
655 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
657 reg-names = "stmmaceth";
659 interrupt-names = "macirq";
660 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
666 snps,mixed-burst;
675 clock-names = "otg";
680 compatible = "st,stm32f4x9-fsotg";
684 clock-names = "otg";
689 compatible = "st,stm32-dcmi";
694 clock-names = "mclk";
695 pinctrl-names = "default";
696 pinctrl-0 = <&dcmi_pins>;
698 dma-names = "tx";
703 compatible = "st,stm32-rng";