Lines Matching +full:stm32 +full:- +full:lptimer
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
44 #include "armv7-m.dtsi"
45 #include <dt-bindings/clock/stm32h7-clks.h>
46 #include <dt-bindings/mfd/stm32h7-rcc.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
51 clk_hse: clk-hse {
52 #clock-cells = <0>;
53 compatible = "fixed-clock";
54 clock-frequency = <0>;
57 clk_lse: clk-lse {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <32768>;
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <0>;
72 compatible = "st,stm32-timer";
79 #address-cells = <1>;
80 #size-cells = <0>;
81 compatible = "st,stm32-lptimer";
84 clock-names = "mux";
88 compatible = "st,stm32-pwm-lp";
89 #pwm-cells = <3>;
94 compatible = "st,stm32-lptimer-trigger";
100 compatible = "st,stm32-lptimer-counter";
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "st,stm32h7-spi";
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "st,stm32h7-spi";
127 compatible = "st,stm32f7-uart";
135 compatible = "st,stm32f7-i2c";
136 #address-cells = <1>;
137 #size-cells = <0>;
147 compatible = "st,stm32f7-i2c";
148 #address-cells = <1>;
149 #size-cells = <0>;
159 compatible = "st,stm32f7-i2c";
160 #address-cells = <1>;
161 #size-cells = <0>;
171 compatible = "st,stm32h7-dac-core";
174 clock-names = "pclk";
175 #address-cells = <1>;
176 #size-cells = <0>;
180 compatible = "st,stm32-dac";
181 #io-channels-cells = <1>;
187 compatible = "st,stm32-dac";
188 #io-channels-cells = <1>;
195 compatible = "st,stm32f7-uart";
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "st,stm32h7-spi";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "st,stm32h7-spi";
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "st,stm32h7-spi";
233 compatible = "st,stm32-dma";
244 #dma-cells = <4>;
246 dma-requests = <8>;
251 compatible = "st,stm32-dma";
262 #dma-cells = <4>;
264 dma-requests = <8>;
268 dmamux1: dma-router@40020800 {
269 compatible = "st,stm32h7-dmamux";
271 #dma-cells = <3>;
272 dma-channels = <16>;
273 dma-requests = <128>;
274 dma-masters = <&dma1 &dma2>;
279 compatible = "st,stm32h7-adc-core";
283 clock-names = "bus";
284 interrupt-controller;
285 #interrupt-cells = <1>;
286 #address-cells = <1>;
287 #size-cells = <0>;
291 compatible = "st,stm32h7-adc";
292 #io-channel-cells = <1>;
294 interrupt-parent = <&adc_12>;
300 compatible = "st,stm32h7-adc";
301 #io-channel-cells = <1>;
303 interrupt-parent = <&adc_12>;
310 compatible = "st,stm32f7-hsotg";
314 clock-names = "otg";
315 g-rx-fifo-size = <256>;
316 g-np-tx-fifo-size = <32>;
317 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
322 compatible = "st,stm32f4x9-fsotg";
326 clock-names = "otg";
331 compatible = "st,stm32h7-mdma";
335 #dma-cells = <5>;
336 dma-channels = <16>;
337 dma-requests = <32>;
340 exti: interrupt-controller@58000000 {
341 compatible = "st,stm32h7-exti";
342 interrupt-controller;
343 #interrupt-cells = <2>;
348 syscfg: system-config@58000400 {
354 #address-cells = <1>;
355 #size-cells = <0>;
356 compatible = "st,stm32h7-spi";
364 compatible = "st,stm32f7-i2c";
365 #address-cells = <1>;
366 #size-cells = <0>;
376 #address-cells = <1>;
377 #size-cells = <0>;
378 compatible = "st,stm32-lptimer";
381 clock-names = "mux";
385 compatible = "st,stm32-pwm-lp";
386 #pwm-cells = <3>;
391 compatible = "st,stm32-lptimer-trigger";
397 compatible = "st,stm32-lptimer-counter";
403 #address-cells = <1>;
404 #size-cells = <0>;
405 compatible = "st,stm32-lptimer";
408 clock-names = "mux";
412 compatible = "st,stm32-pwm-lp";
413 #pwm-cells = <3>;
418 compatible = "st,stm32-lptimer-trigger";
425 #address-cells = <1>;
426 #size-cells = <0>;
427 compatible = "st,stm32-lptimer";
430 clock-names = "mux";
434 compatible = "st,stm32-pwm-lp";
435 #pwm-cells = <3>;
441 #address-cells = <1>;
442 #size-cells = <0>;
443 compatible = "st,stm32-lptimer";
446 clock-names = "mux";
450 compatible = "st,stm32-pwm-lp";
451 #pwm-cells = <3>;
457 compatible = "st,stm32-vrefbuf";
460 regulator-min-microvolt = <1500000>;
461 regulator-max-microvolt = <2500000>;
466 compatible = "st,stm32h7-rtc";
469 clock-names = "pclk", "rtc_ck";
470 assigned-clocks = <&rcc RTC_CK>;
471 assigned-clock-parents = <&rcc LSE_CK>;
472 interrupt-parent = <&exti>;
474 interrupt-names = "alarm";
479 rcc: reset-clock-controller@58024400 {
480 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
482 #clock-cells = <1>;
483 #reset-cells = <1>;
488 pwrcfg: power-config@58024800 {
494 compatible = "st,stm32h7-adc-core";
498 clock-names = "bus";
499 interrupt-controller;
500 #interrupt-cells = <1>;
501 #address-cells = <1>;
502 #size-cells = <0>;
506 compatible = "st,stm32h7-adc";
507 #io-channel-cells = <1>;
509 interrupt-parent = <&adc_3>;
518 clock-frequency = <250000000>;