Lines Matching +full:stm32mp1 +full:- +full:dfsdm
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
25 compatible = "arm,cortex-a7";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
56 clk_hse: clk-hse {
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
62 clk_hsi: clk-hsi {
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <64000000>;
68 clk_lse: clk-lse {
69 #clock-cells = <0>;
70 compatible = "fixed-clock";
71 clock-frequency = <32768>;
74 clk_lsi: clk-lsi {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <32000>;
80 clk_csi: clk-csi {
81 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 clock-frequency = <4000000>;
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
91 interrupt-parent = <&intc>;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 compatible = "st,stm32-timers";
100 clock-names = "int";
104 compatible = "st,stm32-pwm";
109 compatible = "st,stm32h7-timer-trigger";
116 #address-cells = <1>;
117 #size-cells = <0>;
118 compatible = "st,stm32-timers";
121 clock-names = "int";
125 compatible = "st,stm32-pwm";
130 compatible = "st,stm32h7-timer-trigger";
137 #address-cells = <1>;
138 #size-cells = <0>;
139 compatible = "st,stm32-timers";
142 clock-names = "int";
146 compatible = "st,stm32-pwm";
151 compatible = "st,stm32h7-timer-trigger";
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "st,stm32-timers";
163 clock-names = "int";
167 compatible = "st,stm32-pwm";
172 compatible = "st,stm32h7-timer-trigger";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "st,stm32-timers";
184 clock-names = "int";
188 compatible = "st,stm32h7-timer-trigger";
195 #address-cells = <1>;
196 #size-cells = <0>;
197 compatible = "st,stm32-timers";
200 clock-names = "int";
204 compatible = "st,stm32h7-timer-trigger";
211 #address-cells = <1>;
212 #size-cells = <0>;
213 compatible = "st,stm32-timers";
216 clock-names = "int";
220 compatible = "st,stm32-pwm";
225 compatible = "st,stm32h7-timer-trigger";
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "st,stm32-timers";
237 clock-names = "int";
241 compatible = "st,stm32-pwm";
246 compatible = "st,stm32h7-timer-trigger";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "st,stm32-timers";
258 clock-names = "int";
262 compatible = "st,stm32-pwm";
267 compatible = "st,stm32h7-timer-trigger";
274 #address-cells = <1>;
275 #size-cells = <0>;
276 compatible = "st,stm32-lptimer";
279 clock-names = "mux";
283 compatible = "st,stm32-pwm-lp";
284 #pwm-cells = <3>;
289 compatible = "st,stm32-lptimer-trigger";
295 compatible = "st,stm32-lptimer-counter";
301 #address-cells = <1>;
302 #size-cells = <0>;
303 compatible = "st,stm32h7-spi";
310 dma-names = "rx", "tx";
315 #address-cells = <1>;
316 #size-cells = <0>;
317 compatible = "st,stm32h7-spi";
324 dma-names = "rx", "tx";
329 compatible = "st,stm32h7-uart";
337 compatible = "st,stm32h7-uart";
345 compatible = "st,stm32h7-uart";
353 compatible = "st,stm32h7-uart";
361 compatible = "st,stm32f7-i2c";
363 interrupt-names = "event", "error";
368 #address-cells = <1>;
369 #size-cells = <0>;
374 compatible = "st,stm32f7-i2c";
376 interrupt-names = "event", "error";
381 #address-cells = <1>;
382 #size-cells = <0>;
387 compatible = "st,stm32f7-i2c";
389 interrupt-names = "event", "error";
394 #address-cells = <1>;
395 #size-cells = <0>;
400 compatible = "st,stm32f7-i2c";
402 interrupt-names = "event", "error";
407 #address-cells = <1>;
408 #size-cells = <0>;
413 compatible = "st,stm32-cec";
417 clock-names = "cec", "hdmi-cec";
422 compatible = "st,stm32h7-dac-core";
425 clock-names = "pclk";
426 #address-cells = <1>;
427 #size-cells = <0>;
431 compatible = "st,stm32-dac";
432 #io-channels-cells = <1>;
438 compatible = "st,stm32-dac";
439 #io-channels-cells = <1>;
446 compatible = "st,stm32h7-uart";
454 compatible = "st,stm32h7-uart";
462 #address-cells = <1>;
463 #size-cells = <0>;
464 compatible = "st,stm32-timers";
467 clock-names = "int";
471 compatible = "st,stm32-pwm";
476 compatible = "st,stm32h7-timer-trigger";
483 #address-cells = <1>;
484 #size-cells = <0>;
485 compatible = "st,stm32-timers";
488 clock-names = "int";
492 compatible = "st,stm32-pwm";
497 compatible = "st,stm32h7-timer-trigger";
504 compatible = "st,stm32h7-uart";
512 #address-cells = <1>;
513 #size-cells = <0>;
514 compatible = "st,stm32h7-spi";
521 dma-names = "rx", "tx";
526 #address-cells = <1>;
527 #size-cells = <0>;
528 compatible = "st,stm32h7-spi";
535 dma-names = "rx", "tx";
540 #address-cells = <1>;
541 #size-cells = <0>;
542 compatible = "st,stm32-timers";
545 clock-names = "int";
549 compatible = "st,stm32-pwm";
554 compatible = "st,stm32h7-timer-trigger";
561 #address-cells = <1>;
562 #size-cells = <0>;
563 compatible = "st,stm32-timers";
566 clock-names = "int";
570 compatible = "st,stm32-pwm";
574 compatible = "st,stm32h7-timer-trigger";
581 #address-cells = <1>;
582 #size-cells = <0>;
583 compatible = "st,stm32-timers";
586 clock-names = "int";
590 compatible = "st,stm32-pwm";
595 compatible = "st,stm32h7-timer-trigger";
602 #address-cells = <1>;
603 #size-cells = <0>;
604 compatible = "st,stm32h7-spi";
611 dma-names = "rx", "tx";
615 dfsdm: dfsdm@4400d000 { label
616 compatible = "st,stm32mp1-dfsdm";
619 clock-names = "dfsdm";
620 #address-cells = <1>;
621 #size-cells = <0>;
625 compatible = "st,stm32-dfsdm-adc";
626 #io-channel-cells = <1>;
630 dma-names = "rx";
635 compatible = "st,stm32-dfsdm-adc";
636 #io-channel-cells = <1>;
640 dma-names = "rx";
645 compatible = "st,stm32-dfsdm-adc";
646 #io-channel-cells = <1>;
650 dma-names = "rx";
655 compatible = "st,stm32-dfsdm-adc";
656 #io-channel-cells = <1>;
660 dma-names = "rx";
665 compatible = "st,stm32-dfsdm-adc";
666 #io-channel-cells = <1>;
670 dma-names = "rx";
675 compatible = "st,stm32-dfsdm-adc";
676 #io-channel-cells = <1>;
680 dma-names = "rx";
688 reg-names = "m_can", "message_ram";
691 interrupt-names = "int0", "int1";
693 clock-names = "hclk", "cclk";
694 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
701 reg-names = "m_can", "message_ram";
704 interrupt-names = "int0", "int1";
706 clock-names = "hclk", "cclk";
707 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
712 compatible = "st,stm32-dma";
723 #dma-cells = <4>;
725 dma-requests = <8>;
729 compatible = "st,stm32-dma";
740 #dma-cells = <4>;
742 dma-requests = <8>;
745 dmamux1: dma-router@48002000 {
746 compatible = "st,stm32h7-dmamux";
748 #dma-cells = <3>;
749 dma-requests = <128>;
750 dma-masters = <&dma1 &dma2>;
751 dma-channels = <16>;
756 compatible = "st,stm32mp1-adc-core";
761 clock-names = "bus", "adc";
762 interrupt-controller;
763 #interrupt-cells = <1>;
764 #address-cells = <1>;
765 #size-cells = <0>;
769 compatible = "st,stm32mp1-adc";
770 #io-channel-cells = <1>;
772 interrupt-parent = <&adc>;
775 dma-names = "rx";
780 compatible = "st,stm32mp1-adc";
781 #io-channel-cells = <1>;
783 interrupt-parent = <&adc>;
786 dma-names = "rx";
791 usbotg_hs: usb-otg@49000000 {
795 clock-names = "otg";
797 reset-names = "dwc2";
799 g-rx-fifo-size = <256>;
800 g-np-tx-fifo-size = <32>;
801 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
807 compatible = "st,stm32mp1-rcc", "syscon";
809 #clock-cells = <1>;
810 #reset-cells = <1>;
813 exti: interrupt-controller@5000d000 {
814 compatible = "st,stm32mp1-exti", "syscon";
815 interrupt-controller;
816 #interrupt-cells = <2>;
821 compatible = "st,stm32mp157-syscfg", "syscon";
826 #address-cells = <1>;
827 #size-cells = <0>;
828 compatible = "st,stm32-lptimer";
831 clock-names = "mux";
835 compatible = "st,stm32-pwm-lp";
836 #pwm-cells = <3>;
841 compatible = "st,stm32-lptimer-trigger";
847 compatible = "st,stm32-lptimer-counter";
853 #address-cells = <1>;
854 #size-cells = <0>;
855 compatible = "st,stm32-lptimer";
858 clock-names = "mux";
862 compatible = "st,stm32-pwm-lp";
863 #pwm-cells = <3>;
868 compatible = "st,stm32-lptimer-trigger";
875 compatible = "st,stm32-lptimer";
878 clock-names = "mux";
882 compatible = "st,stm32-pwm-lp";
883 #pwm-cells = <3>;
889 compatible = "st,stm32-lptimer";
892 clock-names = "mux";
896 compatible = "st,stm32-pwm-lp";
897 #pwm-cells = <3>;
903 compatible = "st,stm32-vrefbuf";
905 regulator-min-microvolt = <1500000>;
906 regulator-max-microvolt = <2500000>;
912 compatible = "st,stm32mp1-cryp";
921 compatible = "st,stm32f756-hash";
927 dma-names = "in";
928 dma-maxburst = <2>;
933 compatible = "st,stm32-rng";
941 compatible = "st,stm32h7-mdma";
945 #dma-cells = <5>;
946 dma-channels = <32>;
947 dma-requests = <48>;
951 compatible = "st,stm32f469-qspi";
953 reg-names = "qspi", "qspi_mm";
961 compatible = "st,stm32f7-crc";
967 stmmac_axi_config_0: stmmac-axi-config {
974 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
976 reg-names = "stmmaceth";
977 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
978 interrupt-names = "macirq";
979 clock-names = "stmmaceth",
980 "mac-clk-tx",
981 "mac-clk-rx",
983 "syscfg-clk";
990 snps,mixed-burst;
992 snps,axi-config = <&stmmac_axi_config_0>;
997 usbh_ohci: usbh-ohci@5800c000 {
998 compatible = "generic-ohci";
1006 usbh_ehci: usbh-ehci@5800d000 {
1007 compatible = "generic-ehci";
1017 compatible = "st,stm32-dsi";
1020 clock-names = "pclk", "ref", "px_clk";
1022 reset-names = "apb";
1026 ltdc: display-controller@5a001000 {
1027 compatible = "st,stm32-ltdc";
1032 clock-names = "lcd";
1038 compatible = "st,stm32mp1-iwdg";
1041 clock-names = "pclk", "lsi";
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1048 compatible = "st,stm32mp1-usbphyc";
1054 usbphyc_port0: usb-phy@0 {
1055 #phy-cells = <0>;
1059 usbphyc_port1: usb-phy@1 {
1060 #phy-cells = <1>;
1066 compatible = "st,stm32h7-uart";
1074 #address-cells = <1>;
1075 #size-cells = <0>;
1076 compatible = "st,stm32h7-spi";
1083 dma-names = "rx", "tx";
1088 compatible = "st,stm32f7-i2c";
1090 interrupt-names = "event", "error";
1095 #address-cells = <1>;
1096 #size-cells = <0>;
1101 compatible = "st,stm32mp1-rtc";
1104 clock-names = "pclk", "rtc_ck";
1110 compatible = "st,stm32f7-i2c";
1112 interrupt-names = "event", "error";
1117 #address-cells = <1>;
1118 #size-cells = <0>;