Lines Matching +full:uniphier +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,cortex-a9";
31 enable-method = "psci";
32 next-level-cache = <&l2>;
37 compatible = "arm,psci-0.2";
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <25000000>;
48 arm_timer_clk: arm-timer {
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <50000000>;
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
60 interrupt-parent = <&intc>;
62 l2: l2-cache@500c0000 {
63 compatible = "socionext,uniphier-system-cache";
67 cache-unified;
68 cache-size = <(768 * 1024)>;
69 cache-sets = <256>;
70 cache-line-size = <128>;
71 cache-level = <2>;
75 compatible = "socionext,uniphier-uart";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_uart0>;
86 compatible = "socionext,uniphier-uart";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_uart1>;
97 compatible = "socionext,uniphier-uart";
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart2>;
108 compatible = "socionext,uniphier-uart";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_uart3>;
119 compatible = "socionext,uniphier-gpio";
121 interrupt-parent = <&aidet>;
122 interrupt-controller;
123 #interrupt-cells = <2>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 gpio-ranges = <&pinctrl 0 0 0>;
127 gpio-ranges-group-names = "gpio_range";
129 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
132 i2c0: i2c@58780000 {
133 compatible = "socionext,uniphier-fi2c";
136 #address-cells = <1>;
137 #size-cells = <0>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_i2c0>;
143 clock-frequency = <100000>;
146 i2c1: i2c@58781000 {
147 compatible = "socionext,uniphier-fi2c";
150 #address-cells = <1>;
151 #size-cells = <0>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_i2c1>;
157 clock-frequency = <100000>;
160 i2c2: i2c@58782000 {
161 compatible = "socionext,uniphier-fi2c";
164 #address-cells = <1>;
165 #size-cells = <0>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_i2c2>;
171 clock-frequency = <100000>;
174 i2c3: i2c@58783000 {
175 compatible = "socionext,uniphier-fi2c";
178 #address-cells = <1>;
179 #size-cells = <0>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_i2c3>;
185 clock-frequency = <100000>;
190 /* chip-internal connection for DMD */
191 i2c5: i2c@58785000 {
192 compatible = "socionext,uniphier-fi2c";
194 #address-cells = <1>;
195 #size-cells = <0>;
199 clock-frequency = <400000>;
202 /* chip-internal connection for HDMI */
203 i2c6: i2c@58786000 {
204 compatible = "socionext,uniphier-fi2c";
206 #address-cells = <1>;
207 #size-cells = <0>;
211 clock-frequency = <400000>;
214 system_bus: system-bus@58c00000 {
215 compatible = "socionext,uniphier-system-bus";
218 #address-cells = <2>;
219 #size-cells = <1>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_system_bus>;
225 compatible = "socionext,uniphier-smpctrl";
230 compatible = "socionext,uniphier-pro4-mioctrl",
231 "simple-mfd", "syscon";
235 compatible = "socionext,uniphier-pro4-mio-clock";
236 #clock-cells = <1>;
240 compatible = "socionext,uniphier-pro4-mio-reset";
241 #reset-cells = <1>;
246 compatible = "socionext,uniphier-pro4-perictrl",
247 "simple-mfd", "syscon";
251 compatible = "socionext,uniphier-pro4-peri-clock";
252 #clock-cells = <1>;
256 compatible = "socionext,uniphier-pro4-peri-reset";
257 #reset-cells = <1>;
262 compatible = "socionext,uniphier-ehci", "generic-ehci";
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_usb2>;
272 has-transaction-translator;
276 compatible = "socionext,uniphier-ehci", "generic-ehci";
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_usb3>;
286 has-transaction-translator;
289 soc_glue: soc-glue@5f800000 {
290 compatible = "socionext,uniphier-pro4-soc-glue",
291 "simple-mfd", "syscon";
295 compatible = "socionext,uniphier-pro4-pinctrl";
299 soc-glue@5f900000 {
300 compatible = "socionext,uniphier-pro4-soc-glue-debug",
301 "simple-mfd";
302 #address-cells = <1>;
303 #size-cells = <1>;
307 compatible = "socionext,uniphier-efuse";
312 compatible = "socionext,uniphier-efuse";
317 compatible = "socionext,uniphier-efuse";
323 compatible = "socionext,uniphier-pro4-aidet";
325 interrupt-controller;
326 #interrupt-cells = <2>;
330 compatible = "arm,cortex-a9-global-timer";
337 compatible = "arm,cortex-a9-twd-timer";
343 intc: interrupt-controller@60001000 {
344 compatible = "arm,cortex-a9-gic";
347 #interrupt-cells = <3>;
348 interrupt-controller;
352 compatible = "socionext,uniphier-pro4-sysctrl",
353 "simple-mfd", "syscon";
357 compatible = "socionext,uniphier-pro4-clock";
358 #clock-cells = <1>;
362 compatible = "socionext,uniphier-pro4-reset";
363 #reset-cells = <1>;
368 compatible = "socionext,uniphier-pro4-ave4";
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_ether_rgmii>;
374 clock-names = "gio", "ether", "ether-gb", "ether-phy";
377 reset-names = "gio", "ether";
379 phy-mode = "rgmii";
380 local-mac-address = [00 00 00 00 00 00];
381 socionext,syscon-phy-mode = <&soc_glue 0>;
384 #address-cells = <1>;
385 #size-cells = <0>;
390 compatible = "socionext,uniphier-denali-nand-v5a";
392 reg-names = "nand_data", "denali_reg";
395 pinctrl-names = "default";
396 pinctrl-0 = <&pinctrl_nand>;
403 #include "uniphier-pinctrl.dtsi"