Lines Matching +full:low +full:- +full:power +full:- +full:disable

2  * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
17  * MA  02110-1301, USA.
31 #include "irq-common.h"
36 #define AVIC_INTDISNUM		0x0C	/* int disable number reg */
38 #define AVIC_INTENABLEL		0x14	/* int enable reg low */
40 #define AVIC_INTTYPEL		0x1C	/* int type reg low */
41 #define AVIC_NIPRIORITY(x)	(0x20 + 4 * (7 - (x))) /* int priority */
45 #define AVIC_INTSRCL		0x4C	/* int source reg low */
47 #define AVIC_INTFRCL		0x54	/* int force reg low */
49 #define AVIC_NIPNDL		0x5C	/* norm int pending low */
51 #define AVIC_FIPNDL		0x64	/* fast int pending low */
55 /* low power interrupt mask registers */
69 		return -EINVAL;  in avic_set_irq_fiq()
75 		hwirq -= AVIC_NUM_IRQS / 2;  in avic_set_irq_fiq()
97 	struct irq_chip_type *ct = gc->chip_types;  in avic_irq_suspend()
98 	int idx = d->hwirq >> 5;  in avic_irq_suspend()
100 	avic_saved_mask_reg[idx] = imx_readl(avic_base + ct->regs.mask);  in avic_irq_suspend()
101 	imx_writel(gc->wake_active, avic_base + ct->regs.mask);  in avic_irq_suspend()
104 		u8 offs = d->hwirq < AVIC_NUM_IRQS / 2 ?  in avic_irq_suspend()
108 		 * sources. Allow those interrupts in low-power mode.  in avic_irq_suspend()
112 		imx_writel(~gc->wake_active, mx25_ccm_base + offs);  in avic_irq_suspend()
119 	struct irq_chip_type *ct = gc->chip_types;  in avic_irq_resume()
120 	int idx = d->hwirq >> 5;  in avic_irq_resume()
122 	imx_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask);  in avic_irq_resume()
125 		u8 offs = d->hwirq < AVIC_NUM_IRQS / 2 ?  in avic_irq_resume()
142 	gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base,  in avic_init_gc()
144 	gc->private = &avic_extra_irq;  in avic_init_gc()
145 	gc->wake_enabled = IRQ_MSK(32);  in avic_init_gc()
147 	ct = gc->chip_types;  in avic_init_gc()
148 	ct->chip.irq_mask = irq_gc_mask_clr_bit;  in avic_init_gc()
149 	ct->chip.irq_unmask = irq_gc_mask_set_bit;  in avic_init_gc()
150 	ct->chip.irq_ack = irq_gc_mask_clr_bit;  in avic_init_gc()
151 	ct->chip.irq_set_wake = irq_gc_set_wake;  in avic_init_gc()
152 	ct->chip.irq_suspend = avic_irq_suspend;  in avic_init_gc()
153 	ct->chip.irq_resume = avic_irq_resume;  in avic_init_gc()
154 	ct->regs.mask = !idx ? AVIC_INTENABLEL : AVIC_INTENABLEH;  in avic_init_gc()
155 	ct->regs.ack = ct->regs.mask;  in avic_init_gc()
175  * interrupts. It registers the interrupt enable and disable functions
186 	np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");  in mxc_init_irq()
192 		 * before we go into low-power mode.  in mxc_init_irq()
204 	/* disable all interrupts */  in mxc_init_irq()
212 	irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id());  in mxc_init_irq()