2  * arch/arm/mach-ixp4xx/common.c
4  * Generic code shared across all IXP4XX platforms
9  * Copyright 2003-2004 (c) MontaVista, Software, Inc. 
49  * The timer register doesn't allow to specify the two least significant bits of
62  * IXP4xx chipset I/O mapping
94  * GPIO-functions
133  * IXP4xx chipset IRQ handling
143 /* Each bit represents an IRQ: 1: edge-triggered, 0: level triggered */
147  * IRQ -> GPIO mapping table
150 	-1, -1, -1, -1, -1, -1,  0,  1,
151 	-1, -1, -1, -1, -1, -1, -1, -1,
152 	-1, -1, -1,  2,  3,  4,  5,  6,
153 	 7,  8,  9, 10, 11, 12, -1, -1,
164 	return -EINVAL;  in ixp4xx_gpio_to_irq()
169 	int line = irq2gpio[d->irq];  in ixp4xx_set_irq_type()
178 		return -EINVAL;  in ixp4xx_set_irq_type()
202 		return -EINVAL;  in ixp4xx_set_irq_type()
206 		ixp4xx_irq_edge |= (1 << d->irq);  in ixp4xx_set_irq_type()
208 		ixp4xx_irq_edge &= ~(1 << d->irq);  in ixp4xx_set_irq_type()
210 	if (line >= 8) {	/* pins 8-15 */  in ixp4xx_set_irq_type()
211 		line -= 8;  in ixp4xx_set_irq_type()
213 	} else {		/* pins 0-7 */  in ixp4xx_set_irq_type()
227 	gpio_line_config(irq2gpio[d->irq], IXP4XX_GPIO_IN);  in ixp4xx_set_irq_type()
234 	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)  in ixp4xx_irq_mask()
235 		*IXP4XX_ICMR2 &= ~(1 << (d->irq - 32));  in ixp4xx_irq_mask()
237 		*IXP4XX_ICMR &= ~(1 << d->irq);  in ixp4xx_irq_mask()
242 	int line = (d->irq < 32) ? irq2gpio[d->irq] : -1;  in ixp4xx_irq_ack()
254 	if (!(ixp4xx_irq_edge & (1 << d->irq)))  in ixp4xx_irq_unmask()
257 	if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32)  in ixp4xx_irq_unmask()
258 		*IXP4XX_ICMR2 |= (1 << (d->irq - 32));  in ixp4xx_irq_unmask()
260 		*IXP4XX_ICMR |= (1 << d->irq);  in ixp4xx_irq_unmask()
264 	.name		= "IXP4xx",
276 	 * ixp4xx does not implement the XScale PWRMODE register  in ixp4xx_init_irq()
305  * IXP4xx timer tick
306  * We use OS timer1 on the CPU for the timer tick and the timestamp 
317 	evt->event_handler(evt);  in ixp4xx_timer_interrupt()
337 	/* Reset time-stamp counter */  in ixp4xx_timer_init()
368  * USB device controller. The IXP4xx uses the same controller as PXA25X,
372 	.name           = "pxa25x-udc",
373 	.id             = -1,
403 	.name		= "IOP3xx-I2C",
480 	printk("IXP4xx: Using %luMiB expansion bus window size\n",  in ixp4xx_sys_init()
564 	.name			= "ixp4xx timer1",
588 		/* Use on-chip reset capability */  in ixp4xx_restart()
591 		 * "timer" and "enable" registers  in ixp4xx_restart()
595 		/* write 0 to the timer register for an immediate reset */  in ixp4xx_restart()
622 	dev->dma_mask = &dev->coherent_dma_mask;  in ixp4xx_platform_notify()
626 		dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */  in ixp4xx_platform_notify()
632 	dev->coherent_dma_mask = DMA_BIT_MASK(32);  in ixp4xx_platform_notify()
642 		dev->coherent_dma_mask = mask;  in dma_set_coherent_mask()
646 	return -EIO;		/* device wanted sub-64MB mask */  in dma_set_coherent_mask()