Lines Matching +full:device +full:- +full:sram
3 * OMAP SRAM detection and management
8 * Copyright (C) 2009-2012 Texas Instruments
9 * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
31 #include "sram.h"
50 #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
58 * SRAM varies. The default accessible size for all device types is 2k. A GP
59 * device allows ARM11 but not other initiators for full size. This
67 writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ in is_sram_locked()
68 writel_relaxed(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ in is_sram_locked()
69 writel_relaxed(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ in is_sram_locked()
72 writel_relaxed(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ in is_sram_locked()
73 writel_relaxed(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ in is_sram_locked()
74 writel_relaxed(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ in is_sram_locked()
84 * The amount of SRAM depends on the core type.
85 * Note that we cannot try to test for SRAM here because writes
86 * to secure SRAM will hang the system. Also the SRAM is not
121 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
129 * SRAM must be marked as non-cached on OMAP3 since the in omap2_map_sram()
130 * CORE DPLL M2 divider change code (in SRAM) runs with the in omap2_map_sram()