Lines Matching +full:0 +full:x25c
24 #define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130)
25 #define PRCM_ARM_WFI_STANDBY_WFI0 0x08
26 #define PRCM_ARM_WFI_STANDBY_WFI1 0x10
27 #define PRCM_IOCR (prcmu_base + 0x310)
28 #define PRCM_IOCR_IOFORCE 0x1
31 #define PRCM_A9_MASK_REQ (prcmu_base + 0x328)
32 #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1
34 #define PRCM_A9_MASK_ACK (prcmu_base + 0x32c)
35 #define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c)
36 #define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120)
37 #define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124)
38 #define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128)
39 #define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C)
40 #define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260)
41 #define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264)
42 #define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268)
43 #define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C)
53 /* Set bit 0 register value to 1 */ in prcmu_gic_decouple()
63 return 0; in prcmu_gic_decouple()
71 /* Set bit 0 register value to 0 */ in prcmu_gic_recouple()
74 return 0; in prcmu_gic_recouple()
96 for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) { in prcmu_gic_pending_irq()
118 for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { in prcmu_pending_irq()
150 for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) { in prcmu_copy_gic_settings()
156 return 0; in prcmu_copy_gic_settings()
163 return 0; in ux500_suspend_enter()
190 dist_base = of_iomap(np, 0); in ux500_pm_init()