4  * Copyright (c) 2011-2013 Xilinx Inc.
28 #define SLCR_A9_CPU_RST_CTRL_OFFSET	0x244 /* CPU Software Reset Control */
43  * zynq_slcr_write - Write to a register in SLCR block
46  * @offset:	Register offset in SLCR block
50 static int zynq_slcr_write(u32 val, u32 offset)  in zynq_slcr_write()  argument
52 	return regmap_write(zynq_slcr_regmap, offset, val);  in zynq_slcr_write()
56  * zynq_slcr_read - Read a register in SLCR block
59  * @offset:	Register offset in SLCR block
63 static int zynq_slcr_read(u32 *val, u32 offset)  in zynq_slcr_read()  argument
65 	return regmap_read(zynq_slcr_regmap, offset, val);  in zynq_slcr_read()
69  * zynq_slcr_unlock - Unlock SLCR registers
81  * zynq_slcr_get_device_id - Read device code id
97  * zynq_slcr_system_restart - Restart the entire system.
113 	 * the FSBL not loading the bitstream after soft-reboot  in zynq_slcr_system_restart()
128  * zynq_slcr_cpu_start - Start cpu
129  * @cpu:	cpu number
131 void zynq_slcr_cpu_start(int cpu)  in zynq_slcr_cpu_start()  argument
136 	reg &= ~(SLCR_A9_CPU_RST << cpu);  in zynq_slcr_cpu_start()
138 	reg &= ~(SLCR_A9_CPU_CLKSTOP << cpu);  in zynq_slcr_cpu_start()
141 	zynq_slcr_cpu_state_write(cpu, false);  in zynq_slcr_cpu_start()
145  * zynq_slcr_cpu_stop - Stop cpu
146  * @cpu:	cpu number
148 void zynq_slcr_cpu_stop(int cpu)  in zynq_slcr_cpu_stop()  argument
153 	reg |= (SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu;  in zynq_slcr_cpu_stop()
158  * zynq_slcr_cpu_state - Read/write cpu state
159  * @cpu:	cpu number
161  * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1)
162  * 0 means cpu is running, 1 cpu is going to die.
164  * Return: true if cpu is running, false if cpu is going to die
166 bool zynq_slcr_cpu_state_read(int cpu)  in zynq_slcr_cpu_state_read()  argument
171 	state &= 1 << (31 - cpu);  in zynq_slcr_cpu_state_read()
177  * zynq_slcr_cpu_state - Read/write cpu state
178  * @cpu:	cpu number
179  * @die:	cpu state - true if cpu is going to die
181  * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1)
182  * 0 means cpu is running, 1 cpu is going to die.
184 void zynq_slcr_cpu_state_write(int cpu, bool die)  in zynq_slcr_cpu_state_write()  argument
189 	mask = 1 << (31 - cpu);  in zynq_slcr_cpu_state_write()
198  * zynq_early_slcr_init - Early slcr init function
208 	np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");  in zynq_early_slcr_init()
220 	np->data = (__force void *)zynq_slcr_base;  in zynq_early_slcr_init()
222 	zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");  in zynq_early_slcr_init()
224 		pr_err("%s: failed to find zynq-slcr\n", __func__);  in zynq_early_slcr_init()
225 		return -ENODEV;  in zynq_early_slcr_init()
236 	pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);  in zynq_early_slcr_init()