5  *  Modifications for ARM processor (c) 1995-2001 Russell King
7  *  - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
17 #include <linux/sched/debug.h>
23 #include <linux/sched/signal.h>
35  * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
55 #define LDSTHD_I_BIT(i)	(i & (1 << 22))		/* double/half-word immed */
75 /* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */
110 	 * CPUs since we spin re-faulting the instruction without  in safe_usermode()
161 			return -EFAULT;  in alignment_proc_write()
163 			ai_usermode = safe_usermode(mode - '0', true);  in alignment_proc_write()
333 		offset.un = -offset.un;  in do_alignment_finish_ldst()
339 		regs->uregs[RN_BITS(instr)] = addr;  in do_alignment_finish_ldst()
356 		/* signed half-word? */  in do_alignment_ldrhstrh()
360 		regs->uregs[rd] = val;  in do_alignment_ldrhstrh()
362 		put16_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrhstrh()
374 		/* signed half-word? */  in do_alignment_ldrhstrh()
378 		regs->uregs[rd] = val;  in do_alignment_ldrhstrh()
381 		put16t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrhstrh()
400 		/* ARMv7 Thumb-2 32-bit LDRD/STRD */  in do_alignment_ldrdstrd()
418 		regs->uregs[rd] = val;  in do_alignment_ldrdstrd()
420 		regs->uregs[rd2] = val;  in do_alignment_ldrdstrd()
422 		put32_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrdstrd()
423 		put32_unaligned_check(regs->uregs[rd2], addr + 4);  in do_alignment_ldrdstrd()
438 		regs->uregs[rd] = val;  in do_alignment_ldrdstrd()
439 		regs->uregs[rd2] = val2;  in do_alignment_ldrdstrd()
442 		put32t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrdstrd()
443 		put32t_unaligned_check(regs->uregs[rd2], addr + 4);  in do_alignment_ldrdstrd()
467 		regs->uregs[rd] = val;  in do_alignment_ldrstr()
469 		put32_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrstr()
478 		regs->uregs[rd] = val;  in do_alignment_ldrstr()
481 		put32t_unaligned_check(regs->uregs[rd], addr);  in do_alignment_ldrstr()
496  *              ------ increasing address ----->
497  *	        |    | r0 | r1 | ... | rx |    |
513 	regs->ARM_pc += correction;  in do_alignment_ldmstm()
521 	newaddr = eaddr = regs->uregs[rn];  in do_alignment_ldmstm()
524 		nr_regs = -nr_regs;  in do_alignment_ldmstm()
541 	 * This is a "hint" - we already have eaddr worked out by the  in do_alignment_ldmstm()
560 					regs->uregs[rd] = val;  in do_alignment_ldmstm()
562 					put32t_unaligned_check(regs->uregs[rd], eaddr);  in do_alignment_ldmstm()
573 					regs->uregs[rd] = val;  in do_alignment_ldmstm()
575 					put32_unaligned_check(regs->uregs[rd], eaddr);  in do_alignment_ldmstm()
581 		regs->uregs[rn] = newaddr;  in do_alignment_ldmstm()
583 		regs->ARM_pc -= correction;  in do_alignment_ldmstm()
587 	regs->ARM_pc -= correction;  in do_alignment_ldmstm()
591 	pr_err("Alignment trap: not handling ldm with s-bit set\n");  in do_alignment_ldmstm()
605  * 2. If for some reason we're passed an non-ld/st Thumb instruction to
623 			((tinstr & (1<<12)) << (22-12)) |	/* fixup */  in thumb2arm()
625 			((tinstr & (7<<0)) << (12-0)) |		/* Rd */  in thumb2arm()
626 			((tinstr & (7<<3)) << (16-3)) |		/* Rn */  in thumb2arm()
628 				(6 - ((tinstr & (1<<12)) ? 0 : 2)));  in thumb2arm()
633 			((tinstr & (7<<0)) << (12-0)) |		/* Rd */  in thumb2arm()
634 			((tinstr & (7<<3)) << (16-3)) |		/* Rn */  in thumb2arm()
635 			((tinstr & (7<<6)) >> (6-1)) |	 /* immed_5[2:0] */  in thumb2arm()
636 			((tinstr & (3<<9)) >> (9-8));	 /* immed_5[4:3] */  in thumb2arm()
653 			    ((tinstr & (7<<0)) << (12-0)) |	/* Rd */  in thumb2arm()
654 			    ((tinstr & (7<<3)) << (16-3)) |	/* Rn */  in thumb2arm()
655 			    ((tinstr & (7<<6)) >> (6-0));	/* Rm */  in thumb2arm()
661 		 *	 loading 32-bit memory data via PC relative  in thumb2arm()
666 		    ((tinstr & (7<<8)) << (12-8)) |		/* Rd */  in thumb2arm()
667 		    ((tinstr & 255) << (2-0));			/* immed_8 */  in thumb2arm()
674 			((tinstr & (7<<8)) << (12-8)) |		/* Rd */  in thumb2arm()
693 				0xe92d0000,	/* STMDB sp!,{registers} */  in thumb2arm()
694 				0xe92d4000,	/* STMDB sp!,{registers,lr} */  in thumb2arm()
695 				0xe8bd0000,	/* LDMIA sp!,{registers} */  in thumb2arm()
696 				0xe8bd8000	/* LDMIA sp!,{registers,pc} */  in thumb2arm()
709  * Convert Thumb-2 32 bit LDM, STM, LDRD, STRD to equivalent instruction
713  * @pinstr: original Thumb-2 instruction; returns new handlable instruction
742 				0xe92d0000,	/* STMDB sp!,{registers} */  in do_alignment_t32_to_handler()
743 				0xe8bd0000,	/* LDMIA sp!,{registers} */  in do_alignment_t32_to_handler()
756 		poffset->un = (tinst2 & 0xff) << 2;  in do_alignment_t32_to_handler()
825 				/* Thumb-2 32-bit */  in do_alignment()
852 	regs->ARM_pc += isize;  in do_alignment()
859 			offset.un = regs->uregs[RM_BITS(instr)];  in do_alignment()
881 		offset.un = regs->uregs[RM_BITS(instr)];  in do_alignment()
902 					if (regs->ARM_cpsr & PSR_C_BIT)  in do_alignment()
906 							  offset.un << (32 - shiftval);  in do_alignment()
913 	case 0x08000000:	/* ldm or stm, or thumb-2 32bit instruction */  in do_alignment()
932 		regs->ARM_pc -= isize;  in do_alignment()
945 	 * We got a fault - fix it up, or die.  in do_alignment()
969 		       "Address=0x%08lx FSR 0x%03x\n", current->comm,  in do_alignment()
994 		 * the alignment trap won't be re-enabled in that case as it  in do_alignment()
998 		 * entry-common.S) and disable the alignment trap only if  in do_alignment()
1002 		if (!(current_thread_info()->flags & _TIF_WORK_MASK))  in do_alignment()
1030 		return -ENOMEM;  in alignment_init()