2  * arch/arm/mm/cache-xsc3l2.c - XScale3 L2 cache controller support
7  * it under the terms of the GNU General Public License version 2 as
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
56 	int set, way;  in xsc3_l2_inv_all()  local
61 		for (way = 0; way < CACHE_WAY_PER_SET; way++) {  in xsc3_l2_inv_all()
62 			set_way = (way << 29) | (set << 5);  in xsc3_l2_inv_all()
63 			__asm__("mcr p15, 1, %0, c7, c11, 2" : : "r"(set_way));  in xsc3_l2_inv_all()
73 	if (va != -1)  in l2_unmap_va()
82 	unsigned long pa_offset = pa << (32 - PAGE_SHIFT);  in l2_map_va()
83 	if (unlikely(pa_offset < (prev_va << (32 - PAGE_SHIFT)))) {  in l2_map_va()
92 	return va + (pa_offset >> (32 - PAGE_SHIFT));  in l2_map_va()
102 	if (start == 0 && end == -1ul) {  in xsc3_l2_inv_range()
107 	vaddr = -1;  /* to force the first mapping */  in xsc3_l2_inv_range()
112 	if (start & (CACHE_LINE_SIZE - 1)) {  in xsc3_l2_inv_range()
113 		vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr);  in xsc3_l2_inv_range()
116 		start = (start | (CACHE_LINE_SIZE - 1)) + 1;  in xsc3_l2_inv_range()
122 	while (start < (end & ~(CACHE_LINE_SIZE - 1))) {  in xsc3_l2_inv_range()
146 	vaddr = -1;  /* to force the first mapping */  in xsc3_l2_clean_range()
148 	start &= ~(CACHE_LINE_SIZE - 1);  in xsc3_l2_clean_range()
161  * optimize L2 flush all operation by set/way format
166 	int set, way;  in xsc3_l2_flush_all()  local
171 		for (way = 0; way < CACHE_WAY_PER_SET; way++) {  in xsc3_l2_flush_all()
172 			set_way = (way << 29) | (set << 5);  in xsc3_l2_flush_all()
173 			__asm__("mcr p15, 1, %0, c7, c15, 2" : : "r"(set_way));  in xsc3_l2_flush_all()
184 	if (start == 0 && end == -1ul) {  in xsc3_l2_flush_range()
189 	vaddr = -1;  /* to force the first mapping */  in xsc3_l2_flush_range()
191 	start &= ~(CACHE_LINE_SIZE - 1);  in xsc3_l2_flush_range()