Lines Matching +full:no +full:- +full:read +full:- +full:rollover
4 * Copyright (C) 2002-2003 Deep Blue Solutions Ltd, all rights reserved.
23 #include <asm/proc-fns.h>
29 * +-------------------------+-----------+
31 * +-------------------------+-----------+
33 * +-------------------------------------+
40 * by non-64-bit operations.
62 context_id = mm->context.id.counter; in a15_erratum_get_cpumask()
83 * no need for a reserved set of tables (the active ASID tracking prevents
84 * any issues across a rollover).
97 " mrc p15, 0, %0, c2, c0, 1 @ read TTBR1\n" in cpu_set_reserved_ttbr0()
115 pid = task_pid_nr(thread->task) << ASID_BITS; in contextidr_notifier()
150 * rollover, but hasn't run another task in in flush_context()
161 /* Queue a TLB invalidate and flush the I-cache if necessary. */ in flush_context()
195 u64 asid = atomic64_read(&mm->context.id); in new_context()
202 * If our current ASID was active during a rollover, we in new_context()
209 * We had a valid ASID in a previous life, so try to re-use in new_context()
223 * overlapping level-1 descriptors used to map both the module in new_context()
246 if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq)) in check_and_switch_context()
256 asid = atomic64_read(&mm->context.id); in check_and_switch_context()
263 asid = atomic64_read(&mm->context.id); in check_and_switch_context()
266 atomic64_set(&mm->context.id, asid); in check_and_switch_context()
279 cpu_switch_mm(mm->pgd, mm); in check_and_switch_context()