Lines Matching full:macro
34 .macro save_and_disable_daif, flags
39 .macro disable_daif
43 .macro enable_daif
47 .macro restore_daif, flags:req
52 .macro inherit_daif, pstate:req, tmp:req
58 .macro enable_da_f
65 .macro disable_irq
69 .macro enable_irq
73 .macro save_and_disable_irq, flags
78 .macro restore_irq, flags
82 .macro enable_dbg
86 .macro disable_step_tsk, flgs, tmp
96 .macro enable_step_tsk, flgs, tmp
107 .macro smp_dmb, opt
114 .macro esb
125 .macro csdb
133 .macro mask_nospec64, idx, limit, tmp
143 .macro nops, num
152 .macro _asm_extable, from, to
171 .macro ventry label
195 * Define a macro that constructs a 64-bit value by concatenating two
200 .macro regs_to_64, rd, lbits, hbits
202 .macro regs_to_64, rd, hbits, lbits
215 .macro adr_l, dst, sym
227 .macro ldr_l, dst, sym, tmp=
243 .macro str_l, src, sym, tmp
253 .macro adr_this_cpu, dst, sym, tmp
269 .macro ldr_this_cpu dst, sym, tmp
282 .macro vma_vm_mm, rd, rn
289 .macro mmid, rd, rn
297 .macro read_ctr, reg
311 .macro raw_dcache_line_size, reg, tmp
321 .macro dcache_line_size, reg, tmp
332 .macro raw_icache_line_size, reg, tmp
342 .macro icache_line_size, reg, tmp
352 .macro tcr_set_idmap_t0sz, valreg, tmpreg
365 .macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1
376 * Macro to perform a data cache maintenance for the interval
385 .macro __dcache_op_workaround_clean_cache, op, kaddr
393 .macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
419 * Macro to perform an instruction cache maintenance for the interval
426 .macro invalidate_icache_by_line start, end, tmp1, tmp2, label
442 .macro reset_pmuserenr_el0, tmpreg
454 .macro copy_page dest:req src:req t1:req t2:req t3:req t4:req t5:req t6:req t7:req t8:req
497 .macro le64sym, sym
507 .macro mov_q, reg, val
525 .macro get_thread_info, rd
536 .macro phys_to_ttbr, ttbr, phys
545 .macro phys_to_pte, pte, phys
558 .macro pte_to_phys, phys, pte
572 .macro pre_disable_mmu_workaround
584 .macro frame_push, regcount:req, extra
594 .macro frame_pop
598 .macro __frame_regs, reg1, reg2, op, num
606 .macro __frame, op, regcount, extra=0
673 * This macro sequence may clobber all CPU state that is not guaranteed by the
677 .macro cond_yield_neon, lbl
683 .macro if_will_cond_yield_neon
699 .macro do_cond_yield_neon
704 .macro endif_yield_neon, lbl