Lines Matching full:sync

14  * Sync types defined by the MIPS architecture (document MD00087 table 6.5)
15  * These values are used with the sync instruction to perform memory barriers.
16  * Types of ordering guarantees available through the SYNC instruction:
21  * before the SYNC to be already completed. Instead it only requires that those
22  * specified instructions which are subsequent to the SYNC in the instruction
24  * instructions which are before the SYNC in the instruction stream.
35  *   that occurs in the instruction stream before the SYNC instruction must be
37  *   instructions that occur after the SYNC are allowed to be performed, with
46  *   stores preceding the SYNC instruction and both loads and stores that are
47  *   subsequent to the SYNC instruction. Non-zero values of stype may be defined
68  * SYNC instruction completes: Loads, Stores
70  * after the SYNC instruction completes: Loads, Stores
71  * Older instructions which must be globally performed when the SYNC instruction
79  *   that occurs in the instruction stream before the SYNC instruction must
82  *   instruction which occurs after the SYNC instruction in the instruction
85  * - If any memory instruction before the SYNC instruction in program order,
87  *   instruction after the SYNC instruction in program order also generates a
100  * SYNC instruction completes: Loads, Stores
102  * after the SYNC instruction completes: Loads, Stores
103  * Older instructions which must be globally performed when the SYNC instruction
115 		"sync\n\t"			\
152 		"sync\n\t"			\
190 #  define __smp_mb()	__asm__ __volatile__("sync" : : :"memory")
191 #  define __smp_rmb()	__asm__ __volatile__("sync" : : :"memory")
192 #  define __smp_wmb()	__asm__ __volatile__("sync" : : :"memory")
201 #define __WEAK_LLSC_MB		"	sync	\n"