Lines Matching +full:general +full:- +full:purpose
4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
8 * under the terms of the GNU General Public License as published by the
13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
23 #address-cells = <1>;
24 #size-cells = <0>;
29 d-cache-line-size = <32>;
30 i-cache-line-size = <32>;
31 d-cache-size = <0x4000>; // L1, 16K
32 i-cache-size = <0x4000>; // L1, 16K
33 timebase-frequency = <0>; // from bootloader
34 bus-frequency = <0>; // from bootloader
35 clock-frequency = <0>; // from bootloader
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "fsl,mpc5200-immr";
50 bus-frequency = <0>; // from bootloader
51 system-frequency = <0>; // from bootloader
54 compatible = "fsl,mpc5200-cdm";
58 mpc5200_pic: interrupt-controller@500 {
60 interrupt-controller;
61 #interrupt-cells = <3>;
62 compatible = "fsl,mpc5200-pic";
66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200-gpt";
70 fsl,has-wdt;
73 timer@610 { // General Purpose Timer
74 compatible = "fsl,mpc5200-gpt";
79 timer@620 { // General Purpose Timer
80 compatible = "fsl,mpc5200-gpt";
85 timer@630 { // General Purpose Timer
86 compatible = "fsl,mpc5200-gpt";
91 timer@640 { // General Purpose Timer
92 compatible = "fsl,mpc5200-gpt";
97 timer@650 { // General Purpose Timer
98 compatible = "fsl,mpc5200-gpt";
103 timer@660 { // General Purpose Timer
104 compatible = "fsl,mpc5200-gpt";
109 timer@670 { // General Purpose Timer
110 compatible = "fsl,mpc5200-gpt";
116 compatible = "fsl,mpc5200-rtc";
122 compatible = "fsl,mpc5200-mscan";
128 compatible = "fsl,mpc5200-mscan";
134 compatible = "fsl,mpc5200-gpio";
137 gpio-controller;
138 #gpio-cells = <2>;
142 compatible = "fsl,mpc5200-gpio-wkup";
145 gpio-controller;
146 #gpio-cells = <2>;
150 compatible = "fsl,mpc5200-spi";
156 compatible = "fsl,mpc5200-ohci","ohci-be";
161 dma-controller@1200 {
162 compatible = "fsl,mpc5200-bestcomm";
171 compatible = "fsl,mpc5200-xlb";
176 compatible = "fsl,mpc5200-psc-uart";
177 cell-index = <0>;
184 // compatible = "fsl,mpc5200-psc-ac97";
185 // cell-index = <1>;
192 // compatible = "fsl,mpc5200-psc-i2s";
193 // cell-index = <2>;
200 // compatible = "fsl,mpc5200-psc-uart";
201 // cell-index = <3>;
208 // compatible = "fsl,mpc5200-psc-uart";
209 // cell-index = <4>;
216 // compatible = "fsl,mpc5200-psc-spi";
217 // cell-index = <5>;
223 compatible = "fsl,mpc5200-fec";
225 local-mac-address = [ 00 00 00 00 00 00 ];
227 phy-handle = <&phy0>;
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "fsl,mpc5200-mdio";
237 phy0: ethernet-phy@0 {
243 compatible = "fsl,mpc5200-ata";
249 #address-cells = <1>;
250 #size-cells = <0>;
251 compatible = "fsl,mpc5200-i2c","fsl-i2c";
257 #address-cells = <1>;
258 #size-cells = <0>;
259 compatible = "fsl,mpc5200-i2c","fsl-i2c";
270 compatible = "fsl,mpc5200-sram";
276 #interrupt-cells = <1>;
277 #size-cells = <2>;
278 #address-cells = <3>;
280 compatible = "fsl,mpc5200-pci";
282 interrupt-map-mask = <0xf800 0 0 7>;
283 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
287 clock-frequency = <0>; // From boot loader
289 bus-range = <0 0>;
296 compatible = "fsl,mpc5200-lpb","simple-bus";
297 #address-cells = <2>;
298 #size-cells = <1>;
303 compatible = "amd,am29lv652d", "cfi-flash";
305 bank-width = <1>;