Lines Matching full:message

28 /* Get a message register
30  * @reg_num:	the MPIC message register to get
32  * A pointer to the message register is returned.  If
33  * the message register asked for is already in use, then
35  * with an actual message register, then ENODEV is returned.
40 /* Relinquish a message register
42  * @msgr:	the message register to return
44  * Disables the given message register and marks it as free.
45  * After this call has completed successully the message
51 /* Enable a message register
53  * @msgr:	the message register to enable
55  * The given message register is enabled for sending
60 /* Disable a message register
62  * @msgr:	the message register to disable
64  * The given message register is disabled for sending
69 /* Write a message to a message register
71  * @msgr:	the message register to write to
72  * @message:	the message to write
74  * The given 32-bit message is written to the given message
75  * register.  Writing to an enabled message registers fires
78 static inline void mpic_msgr_write(struct mpic_msgr *msgr, u32 message)  in mpic_msgr_write()  argument
80 	out_be32(msgr->base, message);  in mpic_msgr_write()
83 /* Read a message from a message register
85  * @msgr:	the message register to read from
87  * Returns the 32-bit value currently in the given message register.
96 /* Clear a message register
98  * @msgr:	the message register to clear
100  * Clears any interrupts associated with the given message register.
107 /* Set the destination CPU for the message register
109  * @msgr:	the message register whose destination is to be set
110  * @cpu_num:	the Linux CPU number to bind the message register to
121 /* Get the IRQ number for the message register
122  * @msgr:	the message register whose IRQ is to be returned
124  * Returns the IRQ number associated with the given message register.
125  * 0 is returned if this message register is not capable of receiving
126  * interrupts.  What message register can and cannot receive interrupts is