62 static int nmi_virq = 0;
72 		out_le32(reset_reg, 0x6000000);  in pas_restart()
103 	set_tb(timebase >> 32, timebase & 0xffffffff);  in pas_take_timebase()
104 	timebase = 0;  in pas_take_timebase()
133 	reset_reg = ioremap(0xfc101100, 4);  in pas_setup_arch()
143 	reg = 0;  in pas_setup_mce_regs()
145 	dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, NULL);  in pas_setup_mce_regs()
149 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x730);  in pas_setup_mce_regs()
150 		dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, dev);  in pas_setup_mce_regs()
154 	dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);  in pas_setup_mce_regs()
157 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x438);  in pas_setup_mce_regs()
160 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x454);  in pas_setup_mce_regs()
163 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc10);  in pas_setup_mce_regs()
166 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc1c);  in pas_setup_mce_regs()
170 	dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa009, NULL);  in pas_setup_mce_regs()
173 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x200);  in pas_setup_mce_regs()
176 		mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x214);  in pas_setup_mce_regs()
182 	return 0;  in pas_setup_mce_regs()
233 			  mpic_flags, 0, 0, "PASEMI-OPIC");  in pas_init_IRQ()
236 	mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000);  in pas_init_IRQ()
260 	int dump_slb = 0;  in pas_machine_check_handler()
275 	pr_err("SRR0  0x%016lx SRR1 0x%016lx\n", srr0, srr1);  in pas_machine_check_handler()
276 	pr_err("DSISR 0x%016lx DAR  0x%016lx\n", dsisr, regs->dar);  in pas_machine_check_handler()
277 	pr_err("BER   0x%016lx MER  0x%016lx\n", mfspr(SPRN_PA6T_BER),  in pas_machine_check_handler()
279 	pr_err("IER   0x%016lx DER  0x%016lx\n", mfspr(SPRN_PA6T_IER),  in pas_machine_check_handler()
283 	if (srr1 & 0x200000)  in pas_machine_check_handler()
286 	if (srr1 & 0x100000) {  in pas_machine_check_handler()
288 		if (dsisr & 0x8000)  in pas_machine_check_handler()
290 		if (dsisr & 0x4000)  in pas_machine_check_handler()
292 		if (dsisr & 0x2000) {  in pas_machine_check_handler()
296 		if (dsisr & 0x1000)  in pas_machine_check_handler()
298 		if (dsisr & 0x800)  in pas_machine_check_handler()
300 		if (dsisr & 0x400)  in pas_machine_check_handler()
304 	if (srr1 & 0x80000)  in pas_machine_check_handler()
307 	if (srr1 & 0x40000) {  in pas_machine_check_handler()
312 	if (srr1 & 0x20000)  in pas_machine_check_handler()
315 	if (num_mce_regs == 0)  in pas_machine_check_handler()
320 	for (i = 0; i < num_mce_regs; i++)  in pas_machine_check_handler()
321 		pr_err("%s: 0x%08x\n", mce_regs[i].name,  in pas_machine_check_handler()
329 		for (i = 0; i < mmu_slb_size; i++) {  in pas_machine_check_handler()
330 			asm volatile("slbmfee  %0,%1" : "=r" (e) : "r" (i));  in pas_machine_check_handler()
331 			asm volatile("slbmfev  %0,%1" : "=r" (v) : "r" (i));  in pas_machine_check_handler()
338 	return !!(srr1 & 0x2);  in pas_machine_check_handler()
351 		return 0;  in pcmcia_notify()
359 		return 0;  in pcmcia_notify()
362 		return 0;  in pcmcia_notify()
367 	return 0;  in pcmcia_notify()
407 	return 0;  in pasemi_publish_devices()
419 		return 0;  in pas_probe()