32 /* Power ISA 3.0 allows for stop states 0x0 - 0xF */
43  * The default stop state that will be used by ppc_md.power_save
44  * function on platforms that support stop instruction.
51  * First deep stop state. Used to figure out when to save/restore
57  * psscr value and mask of the deepest stop idle state.
154 	 * state like sleep and winkle/stop.  in pnv_alloc_idle_core_states()
194 		 * The stop-api is unable to restore hypervisor  in pnv_alloc_idle_core_states()
205 			 * Use the default stop state for CPU-Hotplug  in pnv_alloc_idle_core_states()
213 				pr_warn("cpuidle-powernv: Offlined CPUs will stop with psscr = 0x%016llx\n",  in pnv_alloc_idle_core_states()
394  * all other threads not to stop, and sending a message to any
395  * that are in a stop state.
469 	 * Program the LPCR via stop-api only if the deepest stop state  in pnv_program_cpu_hotplug_lpcr()
523  * POWER ISA 3.0 defines a new SPR Processor stop Status and Control
534  *	lowest power-saving state the thread entered since stop instruction was
554  *	stop instruction
577 	 * - ESL bit is set for all the deep stop states.  in validate_psscr_val_mask()
608 	 * pnv_first_deep_stop_state should be set to the first stop  in pnv_power9_idle_init()
612 	 * the deepest stop state.  in pnv_power9_idle_init()
615 	 * the shallowest (OPAL_PM_STOP_INST_FAST) loss-less stop state.  in pnv_power9_idle_init()
654 		pr_warn("cpuidle-powernv: No suitable default stop state found. Disabling platform idle.\n");  in pnv_power9_idle_init()
657 		pr_info("cpuidle-powernv: Default stop: psscr = 0x%016llx,mask=0x%016llx\n",  in pnv_power9_idle_init()
662 		pr_warn("cpuidle-powernv: No suitable stop state for CPU-Hotplug. Offlined CPUs will busy wait");  in pnv_power9_idle_init()
664 		pr_info("cpuidle-powernv: Deepest stop: psscr = 0x%016llx,mask=0x%016llx\n",  in pnv_power9_idle_init()
669 	pr_info("cpuidle-powernv: Requested Level (RL) value of first deep stop = 0x%llx\n",  in pnv_power9_idle_init()