21 static unsigned char cached_8259[2] = { 0xff, 0xff };
22 #define cached_A1 (cached_8259[0])
38 	int lock = 0;  in i8259_irq()
48 		outb(0x0C, 0x20);		/* prepare for poll */  in i8259_irq()
49 		irq = inb(0x20) & 7;  in i8259_irq()
55 			outb(0x0C, 0xA0);	/* prepare for poll */  in i8259_irq()
56 			irq = (inb(0xA0) & 7) + 8;  in i8259_irq()
69 			outb(0x0B, 0x20);	/* ISR register */  in i8259_irq()
70 		if(~inb(0x20) & 0x80)  in i8259_irq()
71 			irq = 0;  in i8259_irq()
72 	} else if (irq == 0xff)  in i8259_irq()
73 		irq = 0;  in i8259_irq()
87 		inb(0xA1); 	/* DUMMY */  in i8259_mask_and_ack_irq()
88 		outb(cached_A1, 0xA1);  in i8259_mask_and_ack_irq()
89 		outb(0x20, 0xA0);	/* Non-specific EOI */  in i8259_mask_and_ack_irq()
90 		outb(0x20, 0x20);	/* Non-specific EOI to cascade */  in i8259_mask_and_ack_irq()
93 		inb(0x21); 	/* DUMMY */  in i8259_mask_and_ack_irq()
94 		outb(cached_21, 0x21);  in i8259_mask_and_ack_irq()
95 		outb(0x20, 0x20);	/* Non-specific EOI */  in i8259_mask_and_ack_irq()
102 	outb(cached_A1,0xA1);  in i8259_set_irq_mask()
103 	outb(cached_21,0x21);  in i8259_set_irq_mask()
146 	.start = 0x20,
147 	.end = 0x21,
153 	.start = 0xa0,
154 	.end = 0xa1,
160 	.start = 0x4d0,
161 	.end = 0x4d1,
175 	pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw);  in i8259_host_map()
186 	return 0;  in i8259_host_map()
200 	*out_hwirq = intspec[0];  in i8259_host_xlate()
206 	return 0;  in i8259_host_xlate()
235 	outb(0xff, 0xA1);  in i8259_init()
236 	outb(0xff, 0x21);  in i8259_init()
239 	outb(0x11, 0x20); /* Start init sequence */  in i8259_init()
240 	outb(0x00, 0x21); /* Vector base */  in i8259_init()
241 	outb(0x04, 0x21); /* edge triggered, Cascade (slave) on IRQ2 */  in i8259_init()
242 	outb(0x01, 0x21); /* Select 8086 mode */  in i8259_init()
245 	outb(0x11, 0xA0); /* Start init sequence */  in i8259_init()
246 	outb(0x08, 0xA1); /* Vector base */  in i8259_init()
247 	outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */  in i8259_init()
248 	outb(0x01, 0xA1); /* Select 8086 mode */  in i8259_init()
254 	outb(0x0B, 0x20);  in i8259_init()
255 	outb(0x0B, 0xA0);  in i8259_init()
261 	outb(cached_A1, 0xA1);  in i8259_init()
262 	outb(cached_21, 0x21);  in i8259_init()
282 	if (intack_addr != 0)  in i8259_init()