Lines Matching full:form
150 /* The BA field in an XL form instruction. */
152 /* The BI field in a B form or XL form instruction. */
157 /* The BA field in an XL form instruction when it must be the same
162 /* The BB field in an XL form instruction. */
167 /* The BB field in an XL form instruction when it must be the same
170 /* The VB field in a VX form instruction when it must be the same
175 /* The BD field in a B form instruction. The lower two bits are
180 /* The BD field in a B form instruction when absolute addressing is
185 /* The BD field in a B form instruction when the - modifier is used.
191 /* The BD field in a B form instruction when the - modifier is used
197 /* The BD field in a B form instruction when the + modifier is used.
203 /* The BD field in a B form instruction when the + modifier is used
209 /* The BF field in an X or XL form instruction. */
211 /* The CRFD field in an X form instruction. */
213 /* The CRD field in an XL form instruction. */
217 /* The BF field in an X or XL form instruction. */
226 /* The BFA field in an X or XL form instruction. */
230 /* The BO field in a B form instruction. Certain values are
236 /* The BO field in a B form instruction when the + or - modifier is
241 /* The RM field in an X form instruction. */
248 /* The BT field in an X or XL form instruction. */
252 /* The BI16 field in a BD8 form instruction. */
256 /* The BI32 field in a BD15 form instruction. */
260 /* The BO32 field in a BD15 form instruction. */
264 /* The B8 field in a BD8 form instruction. */
268 /* The B15 field in a BD15 form instruction. The lowest bit is
273 /* The B24 field in a BD24 form instruction. The lowest bit is
278 /* The condition register number portion of the BI field in a B form
279 or XL form instruction. This is used for the extended
285 /* The CRB field in an X form instruction. */
287 /* The MB field in an M form instruction. */
292 /* The CRD32 field in an XL form instruction. */
296 /* The CRFS field in an X form instruction. */
303 /* The CT field in an X form instruction. */
309 /* The D field in a D form instruction. This is a displacement off
315 /* The D8 field in a D form instruction. This is a displacement off
321 /* The DCMX field in an X form instruction. */
325 /* The split DCMX field in an X form instruction. */
329 /* The DQ field in a DQ form instruction. This is like D, but the
335 /* The DS field in a DS form instruction. This is like D, but the
341 /* The DUIS or BHRBE fields in a XFX form instruction, 10 bits
347 /* The split D field in a DX form instruction. */
352 /* The split ND field in a DX form instruction.
360 /* And the ST field in a VX form instruction. */
366 /* The FL1 field in a POWER SC form instruction. */
368 /* The U field in an X form instruction. */
372 /* The FL2 field in a POWER SC form instruction. */
376 /* The FLM field in an XFL form instruction. */
380 /* The FRA field in an X or A form instruction. */
389 /* The FRB field in an X or A form instruction. */
398 /* The FRC field in an A form instruction. */
403 /* The FRS field in an X form instruction or the FRT field in a D, X
404 or A form instruction. */
430 /* The L field in a D or X form instruction. */
436 /* The R field in a HTM X form instruction. */
448 /* The LEV field in a POWER SVC form instruction. */
452 /* The LEV field in an SC form instruction. */
456 /* The LI field in an I form instruction. The lower two bits are
461 /* The LI field in an I form instruction when used as an absolute
466 /* The LS or WC field in an X (sync or wait) form instruction. */
471 /* The ME field in an M form instruction. */
476 /* The MB and ME fields in an M form instruction expressed a single
478 is a two operand form using PPC_OPERAND_NEXT. See the
484 /* The MB or ME field in an MD or MDS form instruction. The high
491 /* The NB field in an X form instruction. The value 32 is stored as
501 /* The NSI field in a D form instruction. This is the same as the
507 /* The NSI field in a D form instruction when we accept a wide range
513 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
522 /* The RA field in the DQ form lq or an lswx instruction, which have special
528 /* The RA field in a D or X form instruction which is an updating
539 /* The RA field in a D or X form instruction which is an updating
550 /* The RB field in an X, XO, M, or MDS form instruction. */
555 /* The RB field in an X form instruction when it must be the same as
574 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
575 instruction or the RT field in a D, DS, X, XFX or XO form
583 /* The RS and RT fields of the DS form stq and DQ form lq instructions,
594 /* The RX field of the SE_RR form instruction. */
598 /* The ARX field of the SE_RR form instruction. */
602 /* The RY field of the SE_RR form instruction. */
607 /* The ARY field of the SE_RR form instruction. */
611 /* The SCLSCI8 field in a D form instruction. */
615 /* The SCLSCI8N field in a D form instruction. This is the same as the
621 /* The SD field of the SD4 form instruction. */
625 /* The SD field of the SD4 form instruction, for halfword. */
629 /* The SD field of the SD4 form instruction, for word. */
633 /* The SH field in an X or M form instruction. */
636 /* The other UIMM field in a EVX form instruction. */
638 /* The FC field in an atomic X form instruction. */
642 /* The SI field in a HTM X form instruction. */
646 /* The SH field in an MD form instruction. This is split. */
655 /* The SI field in a D form instruction. */
659 /* The SI field in a D form instruction when we accept a wide range
664 /* The SI8 field in a D form instruction. */
668 /* The SPR field in an XFX form instruction. This is flipped--the
676 /* The BAT index number in an XFX form m[ft]ibat[lu] instruction. */
681 /* The SPRG register number in an XFX form m[ft]sprg instruction. */
685 /* The SR field in an X form instruction. */
687 /* The 4-bit UIMM field in a VX form instruction. */
691 /* The STRM field in an X AltiVec form instruction. */
693 /* The T field in a tlbilx form instruction. */
699 /* The ESYNC field in an X (sync) form instruction. */
703 /* The SV field in a POWER SC form instruction. */
707 /* The TBR field in an XFX form instruction. This is like the SPR
715 /* The TO field in a D or X form instruction. */
721 /* The UI field in a D form instruction. */
740 /* The VA field in a VA, VX or VXR form instruction. */
744 /* The VB field in a VA, VX or VXR form instruction. */
748 /* The VC field in a VA form instruction. */
752 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
757 /* The SIMM field in a VX form instruction, and TE in Z form. */
762 /* The UIMM field in a VX form instruction. */
767 /* The 3-bit UIMM field in a VX form instruction. */
771 /* The 6-bit UIM field in a X form instruction. */
775 /* The SIX field in a VX form instruction. */
779 /* The PS field in a VX form instruction. */
783 /* The SHB field in a VA form instruction. */
787 /* The other UIMM field in a half word EVX form instruction. */
791 /* The other UIMM field in a word EVX form instruction. */
795 /* The other UIMM field in a double EVX form instruction. */
799 /* The WS or DRM field in an X form instruction. */
807 /* The BO16 field in a BD8 form instruction. */
823 /* The L field in an mtmsrd or A form instruction or R or W in an X form. */
829 /* The RMC or CY field in a Z23 form instruction. */
849 /* The S field in a XL form instruction. */
857 /* The DCM and DGM fields in a Z form instruction. */
866 /* The L field in an mtfsf or XFL form instruction. */
867 /* The A field in a HTM X form instruction. */
895 /* The VLESIMM field in a D form instruction. */
900 /* The VLENSIMM field in a D form instruction. */
905 /* The VLEUIMM field in a D form instruction. */
909 /* The VLEUIMML field in a D form instruction. */
913 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
918 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
923 /* The XA field in an XX3 form instruction. This is split. */
927 /* The XB field in an XX2 or XX3 form instruction. This is split. */
931 /* The XB field in an XX3 form instruction when it must be the same as
937 /* The XC field in an XX4 form instruction. This is split. */
941 /* The DM or SHW field in an XX3 form instruction. */
946 /* The DM field in an extended mnemonic XX3 form instruction. */
950 /* The UIM field in an XX2 form instruction. */
952 /* The 2-bit UIMM field in a VX form instruction. */
964 /* The 8-bit IMM8 field in a XX1 form instruction. */
1080 /* The BA field in an XL form instruction when it must be the same as
1105 /* The BB field in an XL form instruction when it must be the same as
1130 /* The BD field in a B form instruction when the - modifier is used.
1136 we just want to print the normal form of the instruction.
1190 /* The BD field in a B form instruction when the + modifier is used.
1301 /* The BO field in a B form instruction. Warn about attempts to set
1330 /* The BO field in a B form instruction when the + or - modifier is
1363 /* The DCMX field in a X form instruction when the field is split
1383 /* The D field in a DX form instruction when the field is split
1440 /* If only one bit of the FXM field is set, we can use the new form in insert_fxm()
1443 new form unless -mpower4 has been given, or -many and the two in insert_fxm()
1444 operand form of mfcr was used. */ in insert_fxm()
1455 /* A value of -1 means we used the one operand form of in insert_fxm()
1480 /* Check that non-power4 form of mfcr has a zero MASK. */ in extract_fxm()
1567 /* The MB and ME fields in an M form instruction expressed as a single
1655 /* The MB or ME field in an MD or MDS form instruction. The high bit
1675 /* The NB field in an X form instruction. The value 32 is stored as
1711 /* The NSI field in a D form instruction. This is the same as the SI
1734 /* The RA field in a D or X form instruction which is an updating
1764 /* The RA field in the DQ form lq or an lswx instruction, which have special
1780 /* The RA field in a D or X form instruction which is an updating
1795 /* The RB field in an X form instruction when it must be the same as
1971 /* The SH field in an MD form instruction. This is split. */
1998 /* The SPR field in an XFX form instruction. This is flipped--the
2083 /* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
2102 /* The XT and XS fields in an DQ form VSX instruction. This is split. */
2120 /* The XA field in an XX3 form instruction. This is split. */
2139 /* The XB field in an XX3 form instruction. This is split. */
2158 /* The XB field in an XX3 form instruction when it must be the same as
2184 /* The XC field in an XX4 form instruction. This is split. */
2227 /* The VLESIMM field in an I16A form instruction. This is split. */
2269 /* The VLEUIMM field in an I16A form instruction. This is split. */
2288 /* The VLEUIMML field in an I16L form instruction. This is split. */
2308 /* Macros used to form opcodes. */
2315 form instruction. Used for extended mnemonics for the trap
2321 of a D form or X form instruction. Used for extended mnemonics for
2326 /* The main opcode combined with an update code in D form instruction.
2332 D form instruction. Used for VLE volatile context save/restore
2337 /* An A form instruction. */
2353 /* A B form instruction. */
2357 /* A BD8 form instruction. This is a 16-bit instruction. */
2361 /* Another BD8 form instruction. This is a 16-bit instruction. */
2365 /* A BD8 form instruction for simplified mnemonics. */
2374 /* A BD15 form instruction. */
2378 /* A BD15 form instruction for extended conditional branch mnemonics. */
2382 /* A BD15 form instruction for extended conditional branch mnemonics with BI. */
2390 /* A BD24 form instruction. */
2394 /* A B form instruction setting the BO field. */
2407 /* A B form instruction setting the BO field and the condition bits of
2422 /* A VLE C form instruction. */
2428 /* An Context form instruction. */
2432 /* A User Context form instruction. */
2439 /* A DQ form VSX instruction. */
2443 /* A DS form instruction. */
2447 /* An DX form instruction. */
2451 /* An EVSEL form instruction. */
2455 /* An IA16 form instruction. */
2459 /* An I16A form instruction. */
2463 /* An I16L form instruction. */
2467 /* An IM7 form instruction. */
2471 /* An M form instruction. */
2475 /* An LI20 form instruction. */
2479 /* An M form instruction with the ME field specified. */
2488 /* An MD form instruction. */
2498 /* An MDS form instruction. */
2505 /* An SC form instruction. */
2509 /* An SCI8 form instruction. */
2513 /* An SCI8 form instruction. */
2517 /* An SD4 form instruction. This is a 16-bit instruction. */
2521 /* An SE_IM5 form instruction. This is a 16-bit instruction. */
2525 /* An SE_R form instruction. This is a 16-bit instruction. */
2529 /* An SE_RR form instruction. This is a 16-bit instruction. */
2533 /* A VX form instruction. */
2536 /* The mask for an VX form instruction. */
2566 /* A VA form instruction. */
2569 /* The mask for an VA form instruction. */
2575 /* A VXR form instruction. */
2578 /* The mask for a VXR form instruction. */
2581 /* A VX form instruction with a VA tertiary opcode. */
2587 /* An X form instruction. */
2590 /* A X form instruction for Quad-Precision FP Instructions. */
2593 /* An EX form instruction. */
2596 /* The mask for an EX form instruction. */
2599 /* An XX2 form instruction. */
2602 /* A XX2 form instruction with the VA bits specified. */
2605 /* An XX3 form instruction. */
2608 /* An XX3 form instruction with the RC bit specified. */
2611 /* An XX4 form instruction. */
2614 /* A Z form instruction. */
2617 /* An X form instruction with the RC bit specified. */
2620 /* A X form instruction for Quad-Precision FP Instructions with RC bit. */
2623 /* An X form instruction with the RA bits specified as two ops. */
2626 /* A Z form instruction with the RC bit specified. */
2629 /* The mask for an X form instruction. */
2632 /* The mask for an X form instruction with the BF bits specified. */
2635 /* An X form wait instruction with everything filled in except the WC field. */
2638 /* The mask for an XX1 form instruction. */
2644 /* The mask for an XX2 form instruction. */
2647 /* The mask for an XX2 form instruction with the UIM bits specified. */
2650 /* The mask for an XX2 form instruction with the 4 UIM bits specified. */
2653 /* The mask for an XX2 form instruction with the BF bits specified. */
2656 /* The mask for an XX2 form instruction with the BF and DCMX bits specified. */
2659 /* The mask for an XX2 form instruction with a split DCMX bits specified. */
2662 /* The mask for an XX3 form instruction. */
2665 /* The mask for an XX3 form instruction with the BF bits specified. */
2668 /* The mask for an XX3 form instruction with the DM or SHW bits specified. */
2672 /* The mask for an XX4 form instruction. */
2675 /* An X form wait instruction with everything filled in except the WC field. */
2678 /* The mask for an XMMF form instruction. */
2681 /* The mask for a Z form instruction. */
2735 /* An X form instruction with the L bit specified. */
2738 /* An X form instruction with the L bits specified. */
2741 /* An X form instruction with the L bit and RC bit specified. */
2744 /* An X form instruction with RT fields specified */
2748 /* An X form instruction with RT and RA fields specified */
2753 /* The mask for an X form comparison instruction. */
2756 /* The mask for an X form comparison instruction with the L field
2760 /* An X form trap instruction with the TO field specified. */
2764 /* An X form tlb instruction with the SH field specified. */
2768 /* An X form sync instruction. */
2771 /* An X form sync instruction with everything filled in except the LS field. */
2774 /* An X form sync instruction with everything filled in except the L and E fields. */
2780 /* An X form AltiVec dss instruction. */
2784 /* An XFL form instruction. */
2788 /* An X form isel instruction. */
2792 /* An XL form instruction with the LK field set to 0. */
2795 /* An XL form instruction which uses the LK field. */
2798 /* The mask for an XL form instruction. */
2804 /* An XL form instruction which explicitly sets the BO field. */
2809 /* An XL form instruction which explicitly sets the y bit of the BO
2814 /* An XL form instruction which sets the BO field and the condition
2834 /* An X form mbar instruction with MO field. */
2837 /* An XO form instruction. */
2845 /* An XOPS form instruction for paired singles. */
2851 /* An XS form instruction. */
2855 /* A mask for the FXM version of an XFX form instruction. */
2858 /* An XFX form instruction with the FXM field filled in. */
2863 /* An XFX form instruction with the SPR field filled in. */
2868 /* An XFX form instruction with the SPR field filled in except for the
2872 /* An XFX form instruction with the SPR field filled in except for the
2876 /* An X form instruction with everything filled in except the E field. */
2879 /* An X form user context instruction. */
2883 /* An XW form instruction. */
2885 /* The mask for a G form instruction. rc not supported at present. */
2888 /* An APU form instruction. */
2891 /* The mask for an APU form instruction. */
7227 /* The expressions of the form (-x ! 31) & (x | 31) have the value 0