Lines Matching +full:0 +full:x07
25 #define CHT_WC_V1P05A_CTRL 0x6e3b
26 #define CHT_WC_V1P15_CTRL 0x6e3c
27 #define CHT_WC_V1P05A_VSEL 0x6e3d
28 #define CHT_WC_V1P15_VSEL 0x6e3e
29 #define CHT_WC_V1P8A_CTRL 0x6e56
30 #define CHT_WC_V1P8SX_CTRL 0x6e57
31 #define CHT_WC_VDDQ_CTRL 0x6e58
32 #define CHT_WC_V1P2A_CTRL 0x6e59
33 #define CHT_WC_V1P2SX_CTRL 0x6e5a
34 #define CHT_WC_V1P8A_VSEL 0x6e5b
35 #define CHT_WC_VDDQ_VSEL 0x6e5c
36 #define CHT_WC_V2P8SX_CTRL 0x6e5d
37 #define CHT_WC_V3P3A_CTRL 0x6e5e
38 #define CHT_WC_V3P3SD_CTRL 0x6e5f
39 #define CHT_WC_VSDIO_CTRL 0x6e67
40 #define CHT_WC_V3P3A_VSEL 0x6e68
41 #define CHT_WC_VPROG1A_CTRL 0x6e90
42 #define CHT_WC_VPROG1B_CTRL 0x6e91
43 #define CHT_WC_VPROG1F_CTRL 0x6e95
44 #define CHT_WC_VPROG2D_CTRL 0x6e99
45 #define CHT_WC_VPROG3A_CTRL 0x6e9a
46 #define CHT_WC_VPROG3B_CTRL 0x6e9b
47 #define CHT_WC_VPROG4A_CTRL 0x6e9c
48 #define CHT_WC_VPROG4B_CTRL 0x6e9d
49 #define CHT_WC_VPROG4C_CTRL 0x6e9e
50 #define CHT_WC_VPROG4D_CTRL 0x6e9f
51 #define CHT_WC_VPROG5A_CTRL 0x6ea0
52 #define CHT_WC_VPROG5B_CTRL 0x6ea1
53 #define CHT_WC_VPROG6A_CTRL 0x6ea2
54 #define CHT_WC_VPROG6B_CTRL 0x6ea3
55 #define CHT_WC_VPROG1A_VSEL 0x6ec0
56 #define CHT_WC_VPROG1B_VSEL 0x6ec1
57 #define CHT_WC_V1P8SX_VSEL 0x6ec2
58 #define CHT_WC_V1P2SX_VSEL 0x6ec3
59 #define CHT_WC_V1P2A_VSEL 0x6ec4
60 #define CHT_WC_VPROG1F_VSEL 0x6ec5
61 #define CHT_WC_VSDIO_VSEL 0x6ec6
62 #define CHT_WC_V2P8SX_VSEL 0x6ec7
63 #define CHT_WC_V3P3SD_VSEL 0x6ec8
64 #define CHT_WC_VPROG2D_VSEL 0x6ec9
65 #define CHT_WC_VPROG3A_VSEL 0x6eca
66 #define CHT_WC_VPROG3B_VSEL 0x6ecb
67 #define CHT_WC_VPROG4A_VSEL 0x6ecc
68 #define CHT_WC_VPROG4B_VSEL 0x6ecd
69 #define CHT_WC_VPROG4C_VSEL 0x6ece
70 #define CHT_WC_VPROG4D_VSEL 0x6ecf
71 #define CHT_WC_VPROG5A_VSEL 0x6ed0
72 #define CHT_WC_VPROG5B_VSEL 0x6ed1
73 #define CHT_WC_VPROG6A_VSEL 0x6ed2
74 #define CHT_WC_VPROG6B_VSEL 0x6ed3
83 .address = 0x0,
85 .bit = 0x01,
88 .address = 0x04,
90 .bit = 0x07,
93 .address = 0x08,
95 .bit = 0x01,
98 .address = 0x0c,
100 .bit = 0x07,
103 .address = 0x10,
105 .bit = 0x07,
108 .address = 0x14,
110 .bit = 0x07,
113 .address = 0x18,
115 .bit = 0x01,
118 .address = 0x1c,
120 .bit = 0x07,
123 .address = 0x20,
125 .bit = 0x07,
128 .address = 0x24,
133 .address = 0x28,
138 .address = 0x2c,
143 .address = 0x30,
148 .address = 0x34,
150 .bit = 0x07,
153 .address = 0x38,
155 .bit = 0x07,
158 .address = 0x3c,
160 .bit = 0x07,
163 .address = 0x40,
165 .bit = 0x07,
168 .address = 0x44,
170 .bit = 0x07,
173 .address = 0x48,
175 .bit = 0x07,
178 .address = 0x4c,
180 .bit = 0x07,
183 .address = 0x50,
185 .bit = 0x07,
188 .address = 0x54,
190 .bit = 0x07,
193 .address = 0x58,
195 .bit = 0x07,
198 .address = 0x5c,
200 .bit = 0x07,
203 .address = 0x60,
205 .bit = 0x07,
208 .address = 0x64,
210 .bit = 0x07,
213 .address = 0x68,
215 .bit = 0x07,
218 .address = 0x6c,
232 *value = (data & bit) ? 1 : 0; in intel_cht_wc_pmic_get_power()
233 return 0; in intel_cht_wc_pmic_get_power()
239 return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0); in intel_cht_wc_pmic_update_power()