Lines Matching +full:ide +full:- +full:port
2 * ata_piix.c - Intel PATA/SATA controllers
5 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat Inc
10 * Copyright 2003-2005 Jeff Garzik
15 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
16 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
36 * as Documentation/driver-api/libata.rst
57 * PIIX4 errata #9 - Only on ultra obscure hw
58 * ICH3 errata #13 - Not observed to affect real hw
62 * PIIX4 errata #10 - BM IDE hang with non UDMA
64 * 440MX errata #15 - As PIIX4 errata #10
65 * PIIX4 errata #15 - Must not read control registers
67 * 440MX errata #13 - As PIIX4 errata #15
68 * ICH2 errata #21 - DMA mode 0 doesn't work right
69 * ICH0/1 errata #55 - As ICH2 errata #21
70 * ICH2 spec c #9 - Extra operations needed to handle
72 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
74 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
75 * ICH7 errata #16 - MWDMA1 timings are incorrect
78 * 450NX: errata #19 - DMA hangs on old 450NX
79 * 450NX: errata #20 - DMA hangs on old 450NX
80 * 450NX: errata #25 - Corruption with DMA on old 450NX
81 * ICH3 errata #15 - IDE deadlock under high load
83 * ICH3 errata #18 - Don't use native mode
102 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
104 ICH5_PCS = 0x92, /* port control and status */
122 P0 = 0, /* port 0 */
123 P1 = 1, /* port 1 */
124 P2 = 2, /* port 2 */
125 P3 = 3, /* port 3 */
126 IDE = -1, /* IDE */ enumerator
127 NA = -2, /* not available */
128 RV = -3, /* reserved */
132 /* host->flags bits */
149 ich8m_apple_sata, /* locks up on second port enable */
197 /* Intel ICH4-L */
204 /* C-ICH (i810E2) */
210 /* ICH7/7-R (i945, i975) UDMA 100*/
230 /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
231 * Attach iff the controller is in IDE mode. */
240 /* SATA Controller 1 IDE (ICH8) */
242 /* SATA Controller 2 IDE (ICH8) */
244 /* Mobile SATA Controller IDE (ICH8M), Apple */
248 /* Mobile SATA Controller IDE (ICH8M) */
250 /* SATA Controller IDE (ICH9) */
252 /* SATA Controller IDE (ICH9) */
254 /* SATA Controller IDE (ICH9) */
256 /* SATA Controller IDE (ICH9M) */
258 /* SATA Controller IDE (ICH9M) */
260 /* SATA Controller IDE (ICH9M) */
262 /* SATA Controller IDE (Tolapai) */
264 /* SATA Controller IDE (ICH10) */
266 /* SATA Controller IDE (ICH10) */
268 /* SATA Controller IDE (ICH10) */
270 /* SATA Controller IDE (ICH10) */
272 /* SATA Controller IDE (PCH) */
274 /* SATA Controller IDE (PCH) */
276 /* SATA Controller IDE (PCH) */
278 /* SATA Controller IDE (PCH) */
280 /* SATA Controller IDE (PCH) */
282 /* SATA Controller IDE (PCH) */
284 /* SATA Controller IDE (CPT) */
286 /* SATA Controller IDE (CPT) */
288 /* SATA Controller IDE (CPT) */
290 /* SATA Controller IDE (CPT) */
292 /* SATA Controller IDE (PBG) */
294 /* SATA Controller IDE (PBG) */
296 /* SATA Controller IDE (Panther Point) */
298 /* SATA Controller IDE (Panther Point) */
300 /* SATA Controller IDE (Panther Point) */
302 /* SATA Controller IDE (Panther Point) */
304 /* SATA Controller IDE (Lynx Point) */
306 /* SATA Controller IDE (Lynx Point) */
308 /* SATA Controller IDE (Lynx Point) */
310 /* SATA Controller IDE (Lynx Point) */
312 /* SATA Controller IDE (Lynx Point-LP) */
314 /* SATA Controller IDE (Lynx Point-LP) */
316 /* SATA Controller IDE (Lynx Point-LP) */
318 /* SATA Controller IDE (Lynx Point-LP) */
320 /* SATA Controller IDE (DH89xxCC) */
322 /* SATA Controller IDE (Avoton) */
324 /* SATA Controller IDE (Avoton) */
326 /* SATA Controller IDE (Avoton) */
328 /* SATA Controller IDE (Avoton) */
330 /* SATA Controller IDE (Wellsburg) */
332 /* SATA Controller IDE (Wellsburg) */
334 /* SATA Controller IDE (Wellsburg) */
336 /* SATA Controller IDE (Wellsburg) */
338 /* SATA Controller IDE (BayTrail) */
341 /* SATA Controller IDE (Coleto Creek) */
343 /* SATA Controller IDE (9 Series) */
345 /* SATA Controller IDE (9 Series) */
347 /* SATA Controller IDE (9 Series) */
349 /* SATA Controller IDE (9 Series) */
364 { P0, P1, IDE, IDE }, /* 100b */
365 { P1, P0, IDE, IDE }, /* 101b */
366 { IDE, IDE, P0, P1 }, /* 110b */
367 { IDE, IDE, P1, P0 }, /* 111b */
377 { IDE, IDE, P1, P3 }, /* 01b */
378 { P0, P2, IDE, IDE }, /* 10b */
394 { IDE, IDE, P1, P3 }, /* 01b */
395 { P0, P2, IDE, IDE }, /* 10b */
407 { P0, P2, IDE, IDE }, /* 10b (IDE mode) */
431 { P0, P2, IDE, IDE }, /* 10b */
462 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
463 { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
467 MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers");
491 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
495 { 0x24CA, 0x10CF, 0x11AB }, /* ICH4M on Fujitsu-Siemens Lifebook S6120 */
498 { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
505 if (!(ap->flags & PIIX_FLAG_PIO16)) in piix_port_start()
506 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE; in piix_port_start()
512 * ich_pata_cable_detect - Probe host controller cable detect info
513 * @ap: Port for which cable detect info is desired
524 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in ich_pata_cable_detect()
525 struct piix_host_priv *hpriv = ap->host->private_data; in ich_pata_cable_detect()
530 while (lap->device) { in ich_pata_cable_detect()
531 if (lap->device == pdev->device && in ich_pata_cable_detect()
532 lap->subvendor == pdev->subsystem_vendor && in ich_pata_cable_detect()
533 lap->subdevice == pdev->subsystem_device) in ich_pata_cable_detect()
540 mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC; in ich_pata_cable_detect()
541 if ((hpriv->saved_iocfg & mask) == 0) in ich_pata_cable_detect()
547 * piix_pata_prereset - prereset for PATA host controller
556 struct ata_port *ap = link->ap; in piix_pata_prereset()
557 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in piix_pata_prereset()
559 if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no])) in piix_pata_prereset()
560 return -ENOENT; in piix_pata_prereset()
569 struct pci_dev *dev = to_pci_dev(ap->host->dev); in piix_set_timings()
571 unsigned int is_slave = (adev->devno != 0); in piix_set_timings()
572 unsigned int master_port= ap->port_no ? 0x42 : 0x40; in piix_set_timings()
580 * See Intel Document 298600-004 for the timing programing rules in piix_set_timings()
596 if (adev->class == ATA_DEV_ATA) in piix_set_timings()
602 if (adev->pio_mode < XFER_PIO_0 + pio) in piix_set_timings()
619 slave_data &= (ap->port_no ? 0x0f : 0xf0); in piix_set_timings()
622 << (ap->port_no ? 4 : 0); in piix_set_timings()
640 /* Ensure the UDMA bit is off - it will be turned back on if in piix_set_timings()
643 if (ap->udma_mask) { in piix_set_timings()
645 udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); in piix_set_timings()
653 * piix_set_piomode - Initialize host controller PATA PIO timings
654 * @ap: Port whose timings we are configuring
665 piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0); in piix_set_piomode()
669 * do_pata_set_dmamode - Initialize host controller PATA PIO timings
670 * @ap: Port whose timings we are configuring
682 struct pci_dev *dev = to_pci_dev(ap->host->dev); in do_pata_set_dmamode()
684 u8 speed = adev->dma_mode; in do_pata_set_dmamode()
685 int devid = adev->devno + 2 * ap->port_no; in do_pata_set_dmamode()
689 unsigned int udma = speed - XFER_UDMA_0; in do_pata_set_dmamode()
705 u_speed = min(2 - (udma & 1), udma); in do_pata_set_dmamode()
736 unsigned int mwdma = speed - XFER_MW_DMA_0; in do_pata_set_dmamode()
740 int pio = needed_pio[mwdma] - XFER_PIO_0; in do_pata_set_dmamode()
748 * piix_set_dmamode - Initialize host controller PATA DMA timings
749 * @ap: Port whose timings we are configuring
764 * ich_set_dmamode - Initialize host controller PATA DMA timings
765 * @ap: Port whose timings we are configuring
795 struct ata_port *ap = link->ap; in piix_sidpr_sel()
796 struct piix_host_priv *hpriv = ap->host->private_data; in piix_sidpr_sel()
798 iowrite32(((ap->port_no * 2 + link->pmp) << 8) | piix_sidx_map[reg], in piix_sidpr_sel()
799 hpriv->sidpr + PIIX_SIDPR_IDX); in piix_sidpr_sel()
805 struct piix_host_priv *hpriv = link->ap->host->private_data; in piix_sidpr_scr_read()
808 return -EINVAL; in piix_sidpr_scr_read()
811 *val = ioread32(hpriv->sidpr + PIIX_SIDPR_DATA); in piix_sidpr_scr_read()
818 struct piix_host_priv *hpriv = link->ap->host->private_data; in piix_sidpr_scr_write()
821 return -EINVAL; in piix_sidpr_scr_write()
824 iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA); in piix_sidpr_scr_write()
836 if (unlikely(!ap->ioaddr.bmdma_addr)) in piix_irq_check()
839 return ap->ops->bmdma_status(ap) & ATA_DMA_INTR; in piix_irq_check()
966 .ident = "VGN-BX297XP", in piix_broken_suspend()
969 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-BX297XP"), in piix_broken_suspend()
1027 if (pdev->current_state == PCI_D0) in piix_pci_device_suspend()
1028 pdev->current_state = PCI_UNKNOWN; in piix_pci_device_suspend()
1031 spin_lock_irqsave(&host->lock, flags); in piix_pci_device_suspend()
1032 host->flags |= PIIX_HOST_BROKEN_SUSPEND; in piix_pci_device_suspend()
1033 spin_unlock_irqrestore(&host->lock, flags); in piix_pci_device_suspend()
1046 if (host->flags & PIIX_HOST_BROKEN_SUSPEND) { in piix_pci_device_resume()
1047 spin_lock_irqsave(&host->lock, flags); in piix_pci_device_resume()
1048 host->flags &= ~PIIX_HOST_BROKEN_SUSPEND; in piix_pci_device_resume()
1049 spin_unlock_irqrestore(&host->lock, flags); in piix_pci_device_resume()
1060 dev_err(&pdev->dev, in piix_pci_device_resume()
1130 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1138 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1143 [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/
1246 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1304 return -ENOMEM; in piix_disable_ahci()
1313 rc = -EIO; in piix_disable_ahci()
1321 * piix_check_450nx_errata - Check for problem 450NX setup
1338 /* Only on the original revision: IDE DMA can hang */ in piix_check_450nx_errata()
1339 if (pdev->revision == 0x00) in piix_check_450nx_errata()
1341 /* On all revisions below 5 PXB bus lock must be disabled for IDE */ in piix_check_450nx_errata()
1342 else if (cfg & (1<<14) && pdev->revision < 5) in piix_check_450nx_errata()
1346 dev_warn(&ata_dev->dev, in piix_check_450nx_errata()
1347 "450NX errata present, disabling IDE DMA%s\n", in piix_check_450nx_errata()
1348 no_piix_dma == 2 ? " - a BIOS update may resolve this" in piix_check_450nx_errata()
1357 struct pci_dev *pdev = to_pci_dev(host->dev); in piix_init_pcs()
1362 new_pcs = pcs | map_db->port_enable; in piix_init_pcs()
1383 map = map_db->map[map_value & map_db->mask]; in piix_init_sata_map()
1389 p += scnprintf(p, end - p, " XX"); in piix_init_sata_map()
1393 p += scnprintf(p, end - p, " --"); in piix_init_sata_map()
1396 case IDE: in piix_init_sata_map()
1397 WARN_ON((i & 1) || map[i + 1] != IDE); in piix_init_sata_map()
1400 p += scnprintf(p, end - p, " IDE IDE"); in piix_init_sata_map()
1404 p += scnprintf(p, end - p, " P%d", map[i]); in piix_init_sata_map()
1410 dev_info(&pdev->dev, "MAP [%s ]\n", buf); in piix_init_sata_map()
1413 dev_err(&pdev->dev, "invalid MAP value %u\n", map_value); in piix_init_sata_map()
1420 struct pci_dev *pdev = to_pci_dev(host->dev); in piix_no_sidpr()
1423 * Samsung DB-P70 only has three ATA ports exposed and in piix_no_sidpr()
1424 * curiously the unconnected first port reports link online in piix_no_sidpr()
1432 * board, the port can't be disabled solely with the in piix_no_sidpr()
1440 if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 && in piix_no_sidpr()
1441 pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG && in piix_no_sidpr()
1442 pdev->subsystem_device == 0xb049) { in piix_no_sidpr()
1443 dev_warn(host->dev, in piix_no_sidpr()
1444 "Samsung DB-P70 detected, disabling SIDPR\n"); in piix_no_sidpr()
1453 struct pci_dev *pdev = to_pci_dev(host->dev); in piix_init_sidpr()
1454 struct piix_host_priv *hpriv = host->private_data; in piix_init_sidpr()
1455 struct ata_link *link0 = &host->ports[0]->link; in piix_init_sidpr()
1461 if (hpriv->map[i] == IDE) in piix_init_sidpr()
1468 if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR)) in piix_init_sidpr()
1478 hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR]; in piix_init_sidpr()
1487 * un-inhibit power save modes as BIOS might have inhibited in piix_init_sidpr()
1496 dev_info(host->dev, in piix_init_sidpr()
1504 struct ata_port *ap = host->ports[i]; in piix_init_sidpr()
1506 ap->ops = &piix_sidpr_sata_ops; in piix_init_sidpr()
1508 if (ap->flags & ATA_FLAG_SLAVE_POSS) { in piix_init_sidpr()
1535 struct pci_dev *pdev = to_pci_dev(host->dev); in piix_iocfg_bit18_quirk()
1536 struct piix_host_priv *hpriv = host->private_data; in piix_iocfg_bit18_quirk()
1545 if (hpriv->saved_iocfg & (1 << 18)) { in piix_iocfg_bit18_quirk()
1546 dev_info(&pdev->dev, "applying IOCFG bit18 quirk\n"); in piix_iocfg_bit18_quirk()
1548 hpriv->saved_iocfg & ~(1 << 18)); in piix_iocfg_bit18_quirk()
1558 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in piix_broken_system_poweroff()
1567 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in piix_broken_system_poweroff()
1579 unsigned long slot = (unsigned long)dmi->driver_data; in piix_broken_system_poweroff()
1580 /* apply the quirk only to on-board controllers */ in piix_broken_system_poweroff()
1581 return slot == PCI_SLOT(pdev->devfn); in piix_broken_system_poweroff()
1590 "Prefer Hyper-V paravirtualization drivers instead of ATA, "
1591 "0 - Use ATA drivers, "
1592 "1 (Default) - Use the paravirtualization drivers.");
1599 /* On Hyper-V hypervisors the disks are exposed on in piix_ignore_devices_quirk()
1605 .ident = "Hyper-V Virtual Machine", in piix_ignore_devices_quirk()
1617 * identical to a Hyper-V guest. One difference is the in piix_ignore_devices_quirk()
1636 host->flags |= ATA_HOST_IGNORE_ATA; in piix_ignore_devices_quirk()
1637 dev_info(host->dev, "%s detected, ATA device ignore set\n", in piix_ignore_devices_quirk()
1638 ignore->ident); in piix_ignore_devices_quirk()
1644 * piix_init_one - Register PIIX ATA PCI device with kernel services
1655 * Zero on success, or -ERRNO value.
1660 struct device *dev = &pdev->dev; in piix_init_one()
1669 ata_print_version_once(&pdev->dev, DRV_VERSION); in piix_init_one()
1672 if (!in_module_init && ent->driver_data >= ich5_sata) in piix_init_one()
1673 return -ENODEV; in piix_init_one()
1676 piix_port_info[ent->driver_data].flags |= in piix_init_one()
1679 dev_info(&pdev->dev, "quirky BIOS, skipping spindown " in piix_init_one()
1683 port_info[0] = piix_port_info[ent->driver_data]; in piix_init_one()
1684 port_info[1] = piix_port_info[ent->driver_data]; in piix_init_one()
1695 return -ENOMEM; in piix_init_one()
1702 pci_read_config_dword(pdev, PIIX_IOCFG, &hpriv->saved_iocfg); in piix_init_one()
1708 if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) { in piix_init_one()
1716 hpriv->map = piix_init_sata_map(pdev, port_info, in piix_init_one()
1717 piix_map_db_table[ent->driver_data]); in piix_init_one()
1722 host->private_data = hpriv; in piix_init_one()
1726 piix_init_pcs(host, piix_map_db_table[ent->driver_data]); in piix_init_one()
1730 if (host->ports[0]->ops == &piix_sidpr_sata_ops) in piix_init_one()
1741 * message-signalled interrupts currently). in piix_init_one()
1750 host->ports[0]->mwdma_mask = 0; in piix_init_one()
1751 host->ports[0]->udma_mask = 0; in piix_init_one()
1752 host->ports[1]->mwdma_mask = 0; in piix_init_one()
1753 host->ports[1]->udma_mask = 0; in piix_init_one()
1755 host->flags |= ATA_HOST_PARALLEL_SCAN; in piix_init_one()
1767 struct piix_host_priv *hpriv = host->private_data; in piix_remove_one()
1769 pci_write_config_dword(pdev, PIIX_IOCFG, hpriv->saved_iocfg); in piix_remove_one()