Lines Matching +full:vcc +full:- +full:p
3 Copyright (C) 1995-1999 Madge Networks Ltd.
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
110 comes with the revision 0 (140-025-01) ASIC.
114 Madge's SAMBA framer or a SUNI-lite device (early versions). It
115 comes with the revision 1 (140-027-01) ASIC.
119 All Horizon-based cards present with the same PCI Vendor and Device
121 to enable bus-mastering (with appropriate latency).
130 up for loop-timing.
137 line-based timing; the internal RAM is zeroed and the allocation of
141 configurable at module load (if not actually on-demand), however,
189 be implemented as a (real-number) leaky bucket. The GCRA can be used
190 in complicated ways by switches and in simpler ways by end-stations.
191 It can be used both to filter incoming cells and shape out-going
232 (determined by the clock crystal, a fixed (?) per-device divider, a
245 (enforced by driver). So TX is single-threaded.
247 Apart from a minor optimisation to not re-select the last channel,
261 unset, exit). We also re-schedule further transfers for the same
267 (vcc->dev_data) structure and is "cached" on the card.
301 non-four-byte boundary in host memory. Instead the host should
343 . Handle interrupted and/or non-blocking operations.
372 outl (cpu_to_le32 (data), dev->iobase + reg); in wr_regl()
376 return le32_to_cpu (inl (dev->iobase + reg)); in rd_regl()
380 outw (cpu_to_le16 (data), dev->iobase + reg); in wr_regw()
384 return le16_to_cpu (inw (dev->iobase + reg)); in rd_regw()
388 outsb (dev->iobase + reg, addr, len); in wrs_regb()
392 insb (dev->iobase + reg, addr, len); in rds_regb()
400 wr_regl (dev, MEM_WR_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW)); in wr_mem()
406 wr_regl (dev, MEM_RD_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW)); in rd_mem()
467 unsigned char * data = skb->data; in dump_skb()
469 for (i=0; i<skb->len && i < 256;i++) in dump_skb()
507 /********** VPI/VCI <-> (RX) channel conversions **********/
512 unsigned short vci_bits = 10 - vpi_bits; in vpivci_to_channel()
515 return *channel ? 0 : -EINVAL; in vpivci_to_channel()
517 return -EINVAL; in vpivci_to_channel()
547 * a) x = baserate / cellrate, want p * 2^d = x (as far as possible)
548 * b) if x > 16 * 2^14 then set p = 16, d = 14 (min rate), done
549 * if x <= 16 then set p = x, d = 0 (high rates), done
551 * know n such that 2^(n-1) < x/16 <= 2^n, so slide a bit until
553 * d) Also have 8 < x/2^n <= 16, so set p nearest x/2^n
584 // p ranges from 1 to a power of 2
590 // note: rounding the rate down means rounding 'p' up in make_rate()
591 const unsigned long br = test_bit(ultra, &dev->flags) ? BR_ULT : BR_HRZ; in make_rate()
609 return -EINVAL; in make_rate()
619 if (br_man <= (c << (CR_MAXPEXP+CR_MIND-br_exp))) { in make_rate()
625 // but p must be non-zero in make_rate()
631 // but p must be non-zero in make_rate()
637 // but p must be non-zero in make_rate()
639 return -EINVAL; in make_rate()
641 PRINTD (DBG_QOS, "A: p=%u, d=%u", pre, div); in make_rate()
649 if (br_man <= (c << (CR_MAXPEXP+div-br_exp))) { in make_rate()
651 // c << (MAXPEXP+d-1) < B <= c << (MAXPEXP+d) in make_rate()
652 // 1 << (MAXPEXP-1) < B/2^d/c <= 1 << MAXPEXP in make_rate()
665 PRINTD (DBG_QOS, "B: p=%u, d=%u", pre, div); in make_rate()
674 return -EINVAL; in make_rate()
676 PRINTD (DBG_QOS, "C: p=%u, d=%u", pre, div); in make_rate()
680 PRINTD (DBG_QOS, "set_cr internal failure: d=%u p=%u", in make_rate()
682 return -EINVAL; in make_rate()
685 *bits = (div<<CLOCK_SELECT_SHIFT) | (pre-1); in make_rate()
707 return -1; in make_rate_with_tolerance()
709 if (c - tol <= *actual && *actual <= c + tol) in make_rate_with_tolerance()
728 rx_ch_desc * rx_desc = &memmap->rx_descs[channel]; in hrz_open_rx()
732 spin_lock_irqsave (&dev->mem_lock, flags); in hrz_open_rx()
733 channel_type = rd_mem (dev, &rx_desc->wr_buf_type) & BUFFER_PTR_MASK; in hrz_open_rx()
734 spin_unlock_irqrestore (&dev->mem_lock, flags); in hrz_open_rx()
739 return -EBUSY; // clean up? in hrz_open_rx()
743 if (dev->noof_spare_buffers) { in hrz_open_rx()
744 buf_ptr = dev->spare_buffers[--dev->noof_spare_buffers]; in hrz_open_rx()
759 spin_lock_irqsave (&dev->mem_lock, flags); in hrz_open_rx()
761 wr_mem (dev, &rx_desc->wr_buf_type, in hrz_open_rx()
764 wr_mem (dev, &rx_desc->rd_buf_type, buf_ptr); in hrz_open_rx()
766 spin_unlock_irqrestore (&dev->mem_lock, flags); in hrz_open_rx()
768 // rxer->rate = make_rate (qos->peak_cells); in hrz_open_rx()
779 rxer->rate = make_rate (qos->peak_cells);
786 if (ATM_SKB(skb)->vcc->pop) { in hrz_kfree_skb()
787 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb); in hrz_kfree_skb()
802 rx_ch_desc * rx_desc = &memmap->rx_descs[vc]; in hrz_close_rx()
806 spin_lock_irqsave (&dev->mem_lock, flags); in hrz_close_rx()
807 value = rd_mem (dev, &rx_desc->wr_buf_type) & BUFFER_PTR_MASK; in hrz_close_rx()
808 spin_unlock_irqrestore (&dev->mem_lock, flags); in hrz_close_rx()
818 spin_lock_irqsave (&dev->mem_lock, flags); in hrz_close_rx()
821 wr_mem (dev, &rx_desc->wr_buf_type, RX_CHANNEL_DISABLED); in hrz_close_rx()
823 if ((rd_mem (dev, &rx_desc->wr_buf_type) & BUFFER_PTR_MASK) == RX_CHANNEL_DISABLED) in hrz_close_rx()
830 spin_unlock_irqrestore (&dev->mem_lock, flags); in hrz_close_rx()
839 // different process) may cause some data to be mis-delivered then in hrz_close_rx()
840 // there may still be a simpler solution (such as busy-waiting on in hrz_close_rx()
842 // opened - does this leave any holes?). Arguably setting up and in hrz_close_rx()
849 // just disabled - the cell gets relinked at the next vc_open. in hrz_close_rx()
867 r1 = rd_mem (dev, &rx_desc->rd_buf_type); in hrz_close_rx()
885 r2 = rd_mem (dev, &rx_desc->rd_buf_type); in hrz_close_rx()
890 dev->spare_buffers[dev->noof_spare_buffers++] = (u16)r1; in hrz_close_rx()
897 rx_q_entry * wr_ptr = &memmap->rx_q_entries[rd_regw (dev, RX_QUEUE_WR_PTR_OFF)]; in hrz_close_rx()
898 rx_q_entry * rd_ptr = dev->rx_q_entry; in hrz_close_rx()
913 if (rd_ptr == dev->rx_q_wrap) in hrz_close_rx()
914 rd_ptr = dev->rx_q_reset; in hrz_close_rx()
921 spin_unlock_irqrestore (&dev->mem_lock, flags); in hrz_close_rx()
943 rx_bytes = dev->rx_bytes; in rx_schedule()
952 clear_bit (rx_busy, &dev->flags); in rx_schedule()
953 hrz_kfree_skb (dev->rx_skb); in rx_schedule()
960 // one region - the skb itself. I don't know if this will change, in rx_schedule()
971 dev->rx_bytes = 0; in rx_schedule()
974 dev->rx_bytes = rx_bytes - MAX_TRANSFER_COUNT; in rx_schedule()
978 // rx_bytes == 0 -- we're between regions in rx_schedule()
981 unsigned int rx_regions = dev->rx_regions; in rx_schedule()
989 dev->rx_addr = dev->rx_iovec->iov_base; in rx_schedule()
990 rx_bytes = dev->rx_iovec->iov_len; in rx_schedule()
991 ++dev->rx_iovec; in rx_schedule()
992 dev->rx_regions = rx_regions - 1; in rx_schedule()
1000 dev->rx_bytes = 0; in rx_schedule()
1003 dev->rx_bytes = rx_bytes - MAX_TRANSFER_COUNT; in rx_schedule()
1009 // that's all folks - end of frame in rx_schedule()
1010 struct sk_buff * skb = dev->rx_skb; in rx_schedule()
1011 // dev->rx_iovec = 0; in rx_schedule()
1013 FLUSH_RX_CHANNEL (dev, dev->rx_channel); in rx_schedule()
1015 dump_skb ("<<<", dev->rx_channel, skb); in rx_schedule()
1017 PRINTD (DBG_RX|DBG_SKB, "push %p %u", skb->data, skb->len); in rx_schedule()
1020 struct atm_vcc * vcc = ATM_SKB(skb)->vcc; in rx_schedule() local
1022 atomic_inc(&vcc->stats->rx); in rx_schedule()
1025 vcc->push (vcc, skb); in rx_schedule()
1035 rds_regb (dev, DATA_PORT_OFF, dev->rx_addr, rx_bytes); in rx_schedule()
1037 wr_regl (dev, MASTER_RX_ADDR_REG_OFF, virt_to_bus (dev->rx_addr)); in rx_schedule()
1040 dev->rx_addr += rx_bytes; in rx_schedule()
1046 clear_bit (rx_busy, &dev->flags); in rx_schedule()
1047 PRINTD (DBG_RX, "cleared rx_busy for dev %p", dev); in rx_schedule()
1066 if (test_bit (rx_busy, &dev->flags)) { in rx_bus_master_complete_handler()
1079 PRINTD (DBG_TX, "sleeping at tx lock %p %lu", dev, dev->flags); in tx_hold()
1080 wait_event_interruptible(dev->tx_queue, (!test_and_set_bit(tx_busy, &dev->flags))); in tx_hold()
1081 PRINTD (DBG_TX, "woken at tx lock %p %lu", dev, dev->flags); in tx_hold()
1083 return -1; in tx_hold()
1084 PRINTD (DBG_TX, "set tx_busy for dev %p", dev); in tx_hold()
1091 clear_bit (tx_busy, &dev->flags); in tx_release()
1092 PRINTD (DBG_TX, "cleared tx_busy for dev %p", dev); in tx_release()
1093 wake_up_interruptible (&dev->tx_queue); in tx_release()
1109 tx_bytes = dev->tx_bytes; in tx_schedule()
1119 hrz_kfree_skb (dev->tx_skb); in tx_schedule()
1127 if (!test_bit (ultra, &dev->flags) || tx_bytes <= MAX_PIO_COUNT) { in tx_schedule()
1133 if (!dev->tx_iovec) { in tx_schedule()
1137 dev->tx_bytes = 0; in tx_schedule()
1140 dev->tx_bytes = tx_bytes - MAX_TRANSFER_COUNT; in tx_schedule()
1144 // tx_bytes == 0 -- we're between regions in tx_schedule()
1146 unsigned int tx_regions = dev->tx_regions; in tx_schedule()
1150 dev->tx_addr = dev->tx_iovec->iov_base; in tx_schedule()
1151 tx_bytes = dev->tx_iovec->iov_len; in tx_schedule()
1152 ++dev->tx_iovec; in tx_schedule()
1153 dev->tx_regions = tx_regions - 1; in tx_schedule()
1155 if (!test_bit (ultra, &dev->flags) || tx_bytes <= MAX_PIO_COUNT) { in tx_schedule()
1161 dev->tx_bytes = 0; in tx_schedule()
1164 dev->tx_bytes = tx_bytes - MAX_TRANSFER_COUNT; in tx_schedule()
1169 // that's all folks - end of frame in tx_schedule()
1170 struct sk_buff * skb = dev->tx_skb; in tx_schedule()
1171 dev->tx_iovec = NULL; in tx_schedule()
1174 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx); in tx_schedule()
1186 wrs_regb (dev, DATA_PORT_OFF, dev->tx_addr, tx_bytes); in tx_schedule()
1188 wr_regl (dev, TX_DESCRIPTOR_PORT_OFF, cpu_to_be32 (dev->tx_skb->len)); in tx_schedule()
1190 wr_regl (dev, MASTER_TX_ADDR_REG_OFF, virt_to_bus (dev->tx_addr)); in tx_schedule()
1192 wr_regl (dev, TX_DESCRIPTOR_REG_OFF, cpu_to_be32 (dev->tx_skb->len)); in tx_schedule()
1198 dev->tx_addr += tx_bytes; in tx_schedule()
1222 if (test_bit (tx_busy, &dev->flags)) { in tx_bus_master_complete_handler()
1234 // called only from IRQ sub-handler
1237 spin_lock (&dev->mem_lock); in rx_queue_entry_next()
1238 rx_queue_entry = rd_mem (dev, &dev->rx_q_entry->entry); in rx_queue_entry_next()
1239 if (dev->rx_q_entry == dev->rx_q_wrap) in rx_queue_entry_next()
1240 dev->rx_q_entry = dev->rx_q_reset; in rx_queue_entry_next()
1242 dev->rx_q_entry++; in rx_queue_entry_next()
1243 wr_regw (dev, RX_QUEUE_RD_PTR_OFF, dev->rx_q_entry - dev->rx_q_reset); in rx_queue_entry_next()
1244 spin_unlock (&dev->mem_lock); in rx_queue_entry_next()
1260 if (test_and_set_bit (rx_busy, &dev->flags)) { in rx_data_av_handler()
1264 PRINTD (DBG_RX, "set rx_busy for dev %p", dev); in rx_data_av_handler()
1282 // (at least) bus-mastering breaks if we try to handle a in rx_data_av_handler()
1283 // zero-length frame, besides AAL5 does not support them in rx_data_av_handler()
1284 PRINTK (KERN_ERR, "zero-length frame!"); in rx_data_av_handler()
1296 atm_vcc = dev->rxer[rx_channel]; in rx_data_av_handler()
1297 // if no vcc is assigned to this channel, we should drop the frame in rx_data_av_handler()
1302 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) { in rx_data_av_handler()
1304 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) { in rx_data_av_handler()
1309 dev->rx_skb = skb; in rx_data_av_handler()
1311 dev->rx_channel = rx_channel; in rx_data_av_handler()
1315 ATM_SKB(skb)->vcc = atm_vcc; in rx_data_av_handler()
1318 // dev->rx_regions = 0; in rx_data_av_handler()
1319 // dev->rx_iovec = 0; in rx_data_av_handler()
1320 dev->rx_bytes = rx_len; in rx_data_av_handler()
1321 dev->rx_addr = skb->data; in rx_data_av_handler()
1322 PRINTD (DBG_RX, "RX start simple transfer (addr %p, len %d)", in rx_data_av_handler()
1323 skb->data, rx_len); in rx_data_av_handler()
1334 PRINTK (KERN_INFO, "frame received on TX-only VC %x", rx_channel); in rx_data_av_handler()
1339 PRINTK (KERN_WARNING, "dropped over-size frame"); in rx_data_av_handler()
1344 PRINTD (DBG_WARN|DBG_VCC|DBG_RX, "no VCC for this frame (VC closed)"); in rx_data_av_handler()
1356 clear_bit (rx_busy, &dev->flags); in rx_data_av_handler()
1369 PRINTD (DBG_FLOW, "interrupt_handler: %p", dev_id); in interrupt_handler()
1387 // data available as it is a much shorter routine - there is the in interrupt_handler()
1413 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id); in interrupt_handler()
1425 // collect device-specific (not driver/atm-linux) stats here in do_housekeeping()
1426 dev->tx_cell_count += rd_regw (dev, TX_CELL_COUNT_OFF); in do_housekeeping()
1427 dev->rx_cell_count += rd_regw (dev, RX_CELL_COUNT_OFF); in do_housekeeping()
1428 dev->hec_error_count += rd_regw (dev, HEC_ERROR_COUNT_OFF); in do_housekeeping()
1429 dev->unassigned_cell_count += rd_regw (dev, UNASSIGNED_CELL_COUNT_OFF); in do_housekeeping()
1431 mod_timer (&dev->housekeeping, jiffies + HZ/10); in do_housekeeping()
1439 static short setup_idle_tx_channel (hrz_dev * dev, hrz_vcc * vcc) { in setup_idle_tx_channel() argument
1441 short tx_channel = -1; in setup_idle_tx_channel()
1443 PRINTD (DBG_FLOW|DBG_TX, "setup_idle_tx_channel %p", dev); in setup_idle_tx_channel()
1453 return -EBUSY; in setup_idle_tx_channel()
1460 int chan = dev->tx_idle; in setup_idle_tx_channel()
1473 dev->tx_idle = chan; in setup_idle_tx_channel()
1481 tx_ch_desc * tx_desc = &memmap->tx_descs[tx_channel]; in setup_idle_tx_channel()
1484 u16 channel = vcc->channel; in setup_idle_tx_channel()
1487 spin_lock_irqsave (&dev->mem_lock, flags); in setup_idle_tx_channel()
1490 dev->tx_channel_record[tx_channel] = channel; in setup_idle_tx_channel()
1494 vcc->tx_xbr_bits); in setup_idle_tx_channel()
1498 vcc->tx_pcr_bits); in setup_idle_tx_channel()
1501 if (vcc->tx_xbr_bits == VBR_RATE_TYPE) { in setup_idle_tx_channel()
1504 vcc->tx_scr_bits); in setup_idle_tx_channel()
1508 vcc->tx_bucket_bits); in setup_idle_tx_channel()
1512 vcc->tx_bucket_bits); in setup_idle_tx_channel()
1517 rd_ptr = rd_mem (dev, &tx_desc->rd_buf_type) & BUFFER_PTR_MASK; in setup_idle_tx_channel()
1518 wr_ptr = rd_mem (dev, &tx_desc->wr_buf_type) & BUFFER_PTR_MASK; in setup_idle_tx_channel()
1523 // spin_unlock... return -E... in setup_idle_tx_channel()
1529 switch (vcc->aal) { in setup_idle_tx_channel()
1544 wr_mem (dev, &tx_desc->partial_crc, INITIAL_CRC); in setup_idle_tx_channel()
1548 wr_mem (dev, &tx_desc->rd_buf_type, rd_ptr); in setup_idle_tx_channel()
1549 wr_mem (dev, &tx_desc->wr_buf_type, wr_ptr); in setup_idle_tx_channel()
1552 // Payload Type, CLP and GFC would go here if non-zero in setup_idle_tx_channel()
1553 wr_mem (dev, &tx_desc->cell_header, channel); in setup_idle_tx_channel()
1555 spin_unlock_irqrestore (&dev->mem_lock, flags); in setup_idle_tx_channel()
1566 hrz_dev * dev = HRZ_DEV(atm_vcc->dev); in hrz_send()
1567 hrz_vcc * vcc = HRZ_VCC(atm_vcc); in hrz_send() local
1568 u16 channel = vcc->channel; in hrz_send()
1575 PRINTD (DBG_FLOW|DBG_TX, "hrz_send vc %x data %p len %u", in hrz_send()
1576 channel, skb->data, skb->len); in hrz_send()
1580 if (atm_vcc->qos.txtp.traffic_class == ATM_NONE) { in hrz_send()
1581 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", channel); in hrz_send()
1583 return -EIO; in hrz_send()
1587 ATM_SKB(skb)->vcc = atm_vcc; in hrz_send()
1589 if (skb->len > atm_vcc->qos.txtp.max_sdu) { in hrz_send()
1592 return -EIO; in hrz_send()
1598 return -EIO; in hrz_send()
1605 pci_read_config_word (dev->pci_dev, PCI_STATUS, &status); in hrz_send()
1609 pci_write_config_word (dev->pci_dev, PCI_STATUS, status); in hrz_send()
1610 if (test_bit (tx_busy, &dev->flags)) { in hrz_send()
1611 hrz_kfree_skb (dev->tx_skb); in hrz_send()
1619 /* wey-hey! */ in hrz_send()
1623 char * s = skb->data; in hrz_send()
1635 return -ERESTARTSYS; in hrz_send()
1643 buffers_required = (skb->len+(ATM_AAL5_TRAILER-1)) / ATM_CELL_PAYLOAD + 3; in hrz_send()
1645 // replace with timer and sleep, add dev->tx_buffers_queue (max 1 entry) in hrz_send()
1659 return -ERESTARTSYS; in hrz_send()
1664 if (channel == dev->last_vc) { in hrz_send()
1666 tx_channel = dev->tx_last; in hrz_send()
1671 if (dev->tx_channel_record[tx_channel] == channel) { in hrz_send()
1678 tx_channel = setup_idle_tx_channel (dev, vcc); in hrz_send()
1689 dev->last_vc = channel; in hrz_send()
1690 dev->tx_last = tx_channel; in hrz_send()
1700 unsigned int tx_len = skb->len; in hrz_send()
1701 unsigned int tx_iovcnt = skb_shinfo(skb)->nr_frags; in hrz_send()
1703 dev->tx_skb = skb; in hrz_send()
1707 dev->tx_regions = tx_iovcnt; in hrz_send()
1708 dev->tx_iovec = NULL; /* @@@ needs rewritten */ in hrz_send()
1709 dev->tx_bytes = 0; in hrz_send()
1710 PRINTD (DBG_TX|DBG_BUS, "TX start scatter-gather transfer (iovec %p, len %d)", in hrz_send()
1711 skb->data, tx_len); in hrz_send()
1714 return -EIO; in hrz_send()
1717 dev->tx_regions = 0; in hrz_send()
1718 dev->tx_iovec = NULL; in hrz_send()
1719 dev->tx_bytes = tx_len; in hrz_send()
1720 dev->tx_addr = skb->data; in hrz_send()
1721 PRINTD (DBG_TX|DBG_BUS, "TX start simple transfer (addr %p, len %d)", in hrz_send()
1722 skb->data, tx_len); in hrz_send()
1794 if (addr & (1 << (addr_bits-1))) in read_bia()
1814 res |= (1 << (data_bits-1)); in read_bia()
1871 tx_ch_desc * tx_desc = &memmap->tx_descs[chan]; in hrz_init()
1872 cell_buf * buf = &memmap->inittxbufs[chan]; in hrz_init()
1875 wr_mem (dev, &tx_desc->rd_buf_type, BUF_PTR(buf)); in hrz_init()
1876 wr_mem (dev, &tx_desc->wr_buf_type, BUF_PTR(buf)); in hrz_init()
1879 wr_mem (dev, &buf->next, BUFF_STATUS_EMPTY); in hrz_init()
1886 tx_desc = memmap->bufn3; in hrz_init()
1888 wr_mem (dev, &memmap->txfreebufstart.next, BUF_PTR(tx_desc) | BUFF_STATUS_EMPTY); in hrz_init()
1890 for (buff_count = 0; buff_count < BUFN3_SIZE-1; buff_count++) { in hrz_init()
1891 wr_mem (dev, &tx_desc->next, BUF_PTR(tx_desc+1) | BUFF_STATUS_EMPTY); in hrz_init()
1895 wr_mem (dev, &tx_desc->next, BUF_PTR(&memmap->txfreebufend) | BUFF_STATUS_EMPTY); in hrz_init()
1906 rx_ch_desc * rx_desc = &memmap->rx_descs[chan]; in hrz_init()
1908 wr_mem (dev, &rx_desc->wr_buf_type, CHANNEL_TYPE_AAL5 | RX_CHANNEL_DISABLED); in hrz_init()
1915 rx_desc = memmap->bufn4; in hrz_init()
1917 wr_mem (dev, &memmap->rxfreebufstart.next, BUF_PTR(rx_desc) | BUFF_STATUS_EMPTY); in hrz_init()
1919 for (buff_count = 0; buff_count < BUFN4_SIZE-1; buff_count++) { in hrz_init()
1920 wr_mem (dev, &rx_desc->next, BUF_PTR(rx_desc+1) | BUFF_STATUS_EMPTY); in hrz_init()
1925 wr_mem (dev, &rx_desc->next, BUF_PTR(&memmap->rxfreebufend) | BUFF_STATUS_EMPTY); in hrz_init()
1936 // RX config. Use 10-x VC bits, x VP bits, non user cells in channel 0. in hrz_init()
1958 // Test for a 155-capable card in hrz_init()
1966 // test SUNI-lite vs SAMBA in hrz_init()
1968 // Register 0x00 in the SUNI will have some of bits 3-7 set, and in hrz_init()
1993 // Turn off diagnostic loopback and enable line-timed mode in hrz_init()
2017 u8 * esi = dev->atm_dev->esi; in hrz_init()
2051 if (!(tp->max_sdu)) { in check_max_sdu()
2053 tp->max_sdu = ATM_AAL0_SDU; in check_max_sdu()
2054 } else if (tp->max_sdu != ATM_AAL0_SDU) { in check_max_sdu()
2056 return -EINVAL; in check_max_sdu()
2060 if (tp->max_sdu == 0 || tp->max_sdu > ATM_MAX_AAL34_PDU) { in check_max_sdu()
2061 PRINTD (DBG_QOS, "%sing max_sdu", tp->max_sdu ? "capp" : "default"); in check_max_sdu()
2062 tp->max_sdu = ATM_MAX_AAL34_PDU; in check_max_sdu()
2066 if (tp->max_sdu == 0 || tp->max_sdu > max_frame_size) { in check_max_sdu()
2067 PRINTD (DBG_QOS, "%sing max_sdu", tp->max_sdu ? "capp" : "default"); in check_max_sdu()
2068 tp->max_sdu = max_frame_size; in check_max_sdu()
2079 // we are assuming non-UBR, and non-special values of pcr in atm_pcr_check()
2080 if (tp->min_pcr == ATM_MAX_PCR) in atm_pcr_check()
2082 else if (tp->min_pcr < 0) in atm_pcr_check()
2084 else if (tp->min_pcr && tp->min_pcr > pcr) in atm_pcr_check()
2087 // !! max_pcr = UNSPEC (0) is equivalent to max_pcr = MAX (-1) in atm_pcr_check()
2090 if ((0) && tp->max_pcr == ATM_MAX_PCR) in atm_pcr_check()
2092 else if ((tp->max_pcr != ATM_MAX_PCR) && tp->max_pcr < 0) in atm_pcr_check()
2094 else if (tp->max_pcr && tp->max_pcr != ATM_MAX_PCR && tp->max_pcr < pcr) in atm_pcr_check()
2102 pcr, tp->min_pcr, tp->pcr, tp->max_pcr); in atm_pcr_check()
2103 return -EINVAL; in atm_pcr_check()
2117 hrz_dev * dev = HRZ_DEV(atm_vcc->dev); in hrz_open()
2118 hrz_vcc vcc; in hrz_open() local
2120 short vpi = atm_vcc->vpi; in hrz_open()
2121 int vci = atm_vcc->vci; in hrz_open()
2128 return -EINVAL; in hrz_open()
2138 vcc.channel = channel; in hrz_open()
2140 vcc.tx_rate = 0x0; in hrz_open()
2142 qos = &atm_vcc->qos; in hrz_open()
2145 switch (qos->aal) { in hrz_open()
2149 vcc.aal = aal0; in hrz_open()
2154 vcc.aal = aal34; in hrz_open()
2158 vcc.aal = aal5; in hrz_open()
2162 return -EINVAL; in hrz_open()
2201 txtp = &qos->txtp; in hrz_open()
2204 vcc.tx_rate = 0; in hrz_open()
2206 vcc.tx_xbr_bits = IDLE_RATE_TYPE; in hrz_open()
2207 vcc.tx_pcr_bits = CLOCK_DISABLE; in hrz_open()
2209 vcc.tx_scr_bits = CLOCK_DISABLE; in hrz_open()
2210 vcc.tx_bucket_bits = 0; in hrz_open()
2213 if (txtp->traffic_class != ATM_NONE) { in hrz_open()
2214 error = check_max_sdu (vcc.aal, txtp, max_tx_size); in hrz_open()
2220 switch (txtp->traffic_class) { in hrz_open()
2222 // we take "the PCR" as a rate-cap in hrz_open()
2224 vcc.tx_rate = 0; in hrz_open()
2225 make_rate (dev, 1<<30, round_nearest, &vcc.tx_pcr_bits, NULL); in hrz_open()
2226 vcc.tx_xbr_bits = ABR_RATE_TYPE; in hrz_open()
2232 vcc.tx_rate = 0; // ? in hrz_open()
2233 make_rate (dev, 1<<30, round_nearest, &vcc.tx_pcr_bits, 0); in hrz_open()
2234 vcc.tx_xbr_bits = ABR_RATE_TYPE; in hrz_open()
2244 // that no more non-UBR channels can be opened until the in hrz_open()
2248 // slight race (no locking) here so we may get -EAGAIN in hrz_open()
2251 pcr = dev->tx_avail; in hrz_open()
2254 pcr = -pcr; in hrz_open()
2259 &vcc.tx_pcr_bits, &vcc.tx_rate); in hrz_open()
2265 error = atm_pcr_check (txtp, vcc.tx_rate); in hrz_open()
2270 vcc.tx_xbr_bits = CBR_RATE_TYPE; in hrz_open()
2287 pcr = -pcr; in hrz_open()
2292 &vcc.tx_pcr_bits, 0); in hrz_open()
2296 // slight race (no locking) here so we may get -EAGAIN in hrz_open()
2299 scr = dev->tx_avail; in hrz_open()
2302 scr = -scr; in hrz_open()
2307 &vcc.tx_scr_bits, &vcc.tx_rate); in hrz_open()
2313 // error = atm_scr_check (txtp, vcc.tx_rate); in hrz_open()
2319 // capacity must be largest integer smaller than m(p-s)/p + 1 in hrz_open()
2320 // where m = max burst size, p = pcr, s = scr in hrz_open()
2321 bucket = mbs*(pcr-scr)/pcr; in hrz_open()
2322 if (bucket*pcr != mbs*(pcr-scr)) in hrz_open()
2329 vcc.tx_xbr_bits = VBR_RATE_TYPE; in hrz_open()
2330 vcc.tx_bucket_bits = bucket; in hrz_open()
2336 return -EINVAL; in hrz_open()
2345 rxtp = &qos->rxtp; in hrz_open()
2348 vcc.rx_rate = 0; in hrz_open()
2350 if (rxtp->traffic_class != ATM_NONE) { in hrz_open()
2351 error = check_max_sdu (vcc.aal, rxtp, max_rx_size); in hrz_open()
2356 switch (rxtp->traffic_class) { in hrz_open()
2364 vcc.rx_rate = 0; // ? in hrz_open()
2371 // slight race (no locking) here so we may get -EAGAIN in hrz_open()
2374 pcr = dev->rx_avail; in hrz_open()
2376 pcr = -pcr; in hrz_open()
2378 vcc.rx_rate = pcr; in hrz_open()
2380 error = atm_pcr_check (rxtp, vcc.rx_rate); in hrz_open()
2392 // slight race (no locking) here so we may get -EAGAIN in hrz_open()
2395 scr = dev->rx_avail; in hrz_open()
2397 scr = -scr; in hrz_open()
2399 vcc.rx_rate = scr; in hrz_open()
2401 // error = atm_scr_check (rxtp, vcc.rx_rate); in hrz_open()
2411 return -EINVAL; in hrz_open()
2418 if (vcc.aal != aal5) { in hrz_open()
2420 return -EINVAL; in hrz_open()
2423 // get space for our vcc stuff and copy parameters into it in hrz_open()
2427 return -ENOMEM; in hrz_open()
2429 *vccp = vcc; in hrz_open()
2433 spin_lock (&dev->rate_lock); in hrz_open()
2435 if (vcc.tx_rate > dev->tx_avail) { in hrz_open()
2437 error = -EAGAIN; in hrz_open()
2440 if (vcc.rx_rate > dev->rx_avail) { in hrz_open()
2442 error = -EAGAIN; in hrz_open()
2447 dev->tx_avail -= vcc.tx_rate; in hrz_open()
2448 dev->rx_avail -= vcc.rx_rate; in hrz_open()
2450 vcc.tx_rate, vcc.rx_rate); in hrz_open()
2454 spin_unlock (&dev->rate_lock); in hrz_open()
2462 // in hardware" - so long as the next call does not fail :) in hrz_open()
2463 set_bit(ATM_VF_ADDR,&atm_vcc->flags); in hrz_open()
2467 if (rxtp->traffic_class != ATM_NONE) { in hrz_open()
2468 if (dev->rxer[channel]) { in hrz_open()
2470 error = -EBUSY; in hrz_open()
2479 dev->rxer[channel] = atm_vcc; in hrz_open()
2483 atm_vcc->dev_data = (void *) vccp; in hrz_open()
2486 set_bit(ATM_VF_READY,&atm_vcc->flags); in hrz_open()
2494 hrz_dev * dev = HRZ_DEV(atm_vcc->dev); in hrz_close()
2495 hrz_vcc * vcc = HRZ_VCC(atm_vcc); in hrz_close() local
2496 u16 channel = vcc->channel; in hrz_close()
2500 clear_bit(ATM_VF_READY,&atm_vcc->flags); in hrz_close()
2502 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) { in hrz_close()
2511 if (dev->tx_channel_record[i] == channel) { in hrz_close()
2512 dev->tx_channel_record[i] = -1; in hrz_close()
2515 if (dev->last_vc == channel) in hrz_close()
2516 dev->tx_last = -1; in hrz_close()
2520 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) { in hrz_close()
2521 // disable RXing - it tries quite hard in hrz_close()
2523 // forget the vcc - no more skbs will be pushed in hrz_close()
2524 if (atm_vcc != dev->rxer[channel]) in hrz_close()
2525 PRINTK (KERN_ERR, "%s atm_vcc=%p rxer[channel]=%p", in hrz_close()
2527 atm_vcc, dev->rxer[channel]); in hrz_close()
2528 dev->rxer[channel] = NULL; in hrz_close()
2532 spin_lock (&dev->rate_lock); in hrz_close()
2534 vcc->tx_rate, vcc->rx_rate); in hrz_close()
2535 dev->tx_avail += vcc->tx_rate; in hrz_close()
2536 dev->rx_avail += vcc->rx_rate; in hrz_close()
2537 spin_unlock (&dev->rate_lock); in hrz_close()
2540 kfree (vcc); in hrz_close()
2542 clear_bit(ATM_VF_ADDR,&atm_vcc->flags); in hrz_close()
2548 hrz_dev * dev = HRZ_DEV(atm_vcc->dev);
2558 return -ENOPROTOOPT;
2562 return -EINVAL;
2567 hrz_dev * dev = HRZ_DEV(atm_vcc->dev);
2577 return -ENOPROTOOPT;
2581 return -EINVAL;
2589 return -1;
2605 hrz_dev * dev = HRZ_DEV(vcc->dev);
2607 return -1;
2621 if (!left--) { in hrz_proc_read()
2633 if (!left--) in hrz_proc_read()
2636 dev->tx_cell_count, dev->rx_cell_count, in hrz_proc_read()
2637 dev->hec_error_count, dev->unassigned_cell_count); in hrz_proc_read()
2639 if (!left--) in hrz_proc_read()
2644 dev->noof_spare_buffers); in hrz_proc_read()
2646 if (!left--) in hrz_proc_read()
2649 dev->tx_avail, dev->rx_avail); in hrz_proc_read()
2677 return -EINVAL; in hrz_probe()
2681 err = -EINVAL; in hrz_probe()
2689 err = -ENOMEM; in hrz_probe()
2695 // grab IRQ and install handler - move this someplace more sensible in hrz_probe()
2696 irq = pci_dev->irq; in hrz_probe()
2703 err = -EINVAL; in hrz_probe()
2707 PRINTD(DBG_INFO, "found Madge ATM adapter (hrz) at: IO %x, IRQ %u, MEM %p", in hrz_probe()
2710 dev->atm_dev = atm_dev_register(DEV_LABEL, &pci_dev->dev, &hrz_ops, -1, in hrz_probe()
2712 if (!(dev->atm_dev)) { in hrz_probe()
2714 err = -EINVAL; in hrz_probe()
2718 PRINTD(DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p", in hrz_probe()
2719 dev->atm_dev->number, dev, dev->atm_dev); in hrz_probe()
2720 dev->atm_dev->dev_data = (void *) dev; in hrz_probe()
2721 dev->pci_dev = pci_dev; in hrz_probe()
2738 dev->iobase = iobase; in hrz_probe()
2739 dev->irq = irq; in hrz_probe()
2740 dev->membase = membase; in hrz_probe()
2742 dev->rx_q_entry = dev->rx_q_reset = &memmap->rx_q_entries[0]; in hrz_probe()
2743 dev->rx_q_wrap = &memmap->rx_q_entries[RX_CHANS-1]; in hrz_probe()
2746 dev->last_vc = -1; in hrz_probe()
2747 dev->tx_last = -1; in hrz_probe()
2748 dev->tx_idle = 0; in hrz_probe()
2750 dev->tx_regions = 0; in hrz_probe()
2751 dev->tx_bytes = 0; in hrz_probe()
2752 dev->tx_skb = NULL; in hrz_probe()
2753 dev->tx_iovec = NULL; in hrz_probe()
2755 dev->tx_cell_count = 0; in hrz_probe()
2756 dev->rx_cell_count = 0; in hrz_probe()
2757 dev->hec_error_count = 0; in hrz_probe()
2758 dev->unassigned_cell_count = 0; in hrz_probe()
2760 dev->noof_spare_buffers = 0; in hrz_probe()
2765 dev->tx_channel_record[i] = -1; in hrz_probe()
2768 dev->flags = 0; in hrz_probe()
2771 // Fibre: ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53 in hrz_probe()
2773 // Copper: (plagarise!) 25600000/8/270*260/53 - n/53 in hrz_probe()
2777 dev->tx_avail = ATM_OC3_PCR; in hrz_probe()
2778 dev->rx_avail = ATM_OC3_PCR; in hrz_probe()
2779 set_bit(ultra, &dev->flags); // NOT "|= ultra" ! in hrz_probe()
2781 dev->tx_avail = ((25600000/8)*26)/(27*53); in hrz_probe()
2782 dev->rx_avail = ((25600000/8)*26)/(27*53); in hrz_probe()
2783 PRINTD(DBG_WARN, "Buggy ASIC: no TX bus-mastering."); in hrz_probe()
2787 spin_lock_init(&dev->rate_lock); in hrz_probe()
2789 // on-board memory access spinlock; we want atomic reads and in hrz_probe()
2791 spin_lock_init(&dev->mem_lock); in hrz_probe()
2793 init_waitqueue_head(&dev->tx_queue); in hrz_probe()
2796 dev->atm_dev->ci_range.vpi_bits = vpi_bits; in hrz_probe()
2797 dev->atm_dev->ci_range.vci_bits = 10-vpi_bits; in hrz_probe()
2799 timer_setup(&dev->housekeeping, do_housekeeping, 0); in hrz_probe()
2800 mod_timer(&dev->housekeeping, jiffies); in hrz_probe()
2822 PRINTD(DBG_INFO, "closing %p (atm_dev = %p)", dev, dev->atm_dev); in hrz_remove_one()
2823 del_timer_sync(&dev->housekeeping); in hrz_remove_one()
2825 atm_dev_deregister(dev->atm_dev); in hrz_remove_one()
2826 free_irq(dev->irq, dev); in hrz_remove_one()
2827 release_region(dev->iobase, HRZ_IO_EXTENT); in hrz_remove_one()