Lines Matching +full:interrupt +full:- +full:map +full:- +full:mask
15 #include <linux/interrupt.h>
28 struct regmap *map; member
53 return &data->chip->irqs[irq]; in irq_to_regmap_irq()
60 mutex_lock(&d->lock); in regmap_irq_lock()
64 unsigned int reg, unsigned int mask, in regmap_irq_update_bits() argument
67 if (d->chip->mask_writeonly) in regmap_irq_update_bits()
68 return regmap_write_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
70 return regmap_update_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
76 struct regmap *map = d->map; in regmap_irq_sync_unlock() local
81 if (d->chip->runtime_pm) { in regmap_irq_sync_unlock()
82 ret = pm_runtime_get_sync(map->dev); in regmap_irq_sync_unlock()
84 dev_err(map->dev, "IRQ sync failed to resume: %d\n", in regmap_irq_sync_unlock()
89 * If there's been a change in the mask write it back to the in regmap_irq_sync_unlock()
93 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
94 if (!d->chip->mask_base) in regmap_irq_sync_unlock()
97 reg = d->chip->mask_base + in regmap_irq_sync_unlock()
98 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
99 if (d->chip->mask_invert) { in regmap_irq_sync_unlock()
101 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
102 } else if (d->chip->unmask_base) { in regmap_irq_sync_unlock()
103 /* set mask with mask_base register */ in regmap_irq_sync_unlock()
105 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
107 dev_err(d->map->dev, in regmap_irq_sync_unlock()
110 unmask_offset = d->chip->unmask_base - in regmap_irq_sync_unlock()
111 d->chip->mask_base; in regmap_irq_sync_unlock()
112 /* clear mask with unmask_base register */ in regmap_irq_sync_unlock()
115 d->mask_buf_def[i], in regmap_irq_sync_unlock()
116 d->mask_buf[i]); in regmap_irq_sync_unlock()
119 d->mask_buf_def[i], d->mask_buf[i]); in regmap_irq_sync_unlock()
122 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock()
125 reg = d->chip->wake_base + in regmap_irq_sync_unlock()
126 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
127 if (d->wake_buf) { in regmap_irq_sync_unlock()
128 if (d->chip->wake_invert) in regmap_irq_sync_unlock()
130 d->mask_buf_def[i], in regmap_irq_sync_unlock()
131 ~d->wake_buf[i]); in regmap_irq_sync_unlock()
134 d->mask_buf_def[i], in regmap_irq_sync_unlock()
135 d->wake_buf[i]); in regmap_irq_sync_unlock()
137 dev_err(d->map->dev, in regmap_irq_sync_unlock()
142 if (!d->chip->init_ack_masked) in regmap_irq_sync_unlock()
146 * OR if there is masked interrupt which hasn't been Acked, in regmap_irq_sync_unlock()
149 if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) { in regmap_irq_sync_unlock()
150 reg = d->chip->ack_base + in regmap_irq_sync_unlock()
151 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
153 if (d->chip->ack_invert) in regmap_irq_sync_unlock()
154 ret = regmap_write(map, reg, ~d->mask_buf[i]); in regmap_irq_sync_unlock()
156 ret = regmap_write(map, reg, d->mask_buf[i]); in regmap_irq_sync_unlock()
158 dev_err(d->map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_sync_unlock()
163 for (i = 0; i < d->chip->num_type_reg; i++) { in regmap_irq_sync_unlock()
164 if (!d->type_buf_def[i]) in regmap_irq_sync_unlock()
166 reg = d->chip->type_base + in regmap_irq_sync_unlock()
167 (i * map->reg_stride * d->type_reg_stride); in regmap_irq_sync_unlock()
168 if (d->chip->type_invert) in regmap_irq_sync_unlock()
170 d->type_buf_def[i], ~d->type_buf[i]); in regmap_irq_sync_unlock()
173 d->type_buf_def[i], d->type_buf[i]); in regmap_irq_sync_unlock()
175 dev_err(d->map->dev, "Failed to sync type in %x\n", in regmap_irq_sync_unlock()
179 if (d->chip->runtime_pm) in regmap_irq_sync_unlock()
180 pm_runtime_put(map->dev); in regmap_irq_sync_unlock()
183 if (d->wake_count < 0) in regmap_irq_sync_unlock()
184 for (i = d->wake_count; i < 0; i++) in regmap_irq_sync_unlock()
185 irq_set_irq_wake(d->irq, 0); in regmap_irq_sync_unlock()
186 else if (d->wake_count > 0) in regmap_irq_sync_unlock()
187 for (i = 0; i < d->wake_count; i++) in regmap_irq_sync_unlock()
188 irq_set_irq_wake(d->irq, 1); in regmap_irq_sync_unlock()
190 d->wake_count = 0; in regmap_irq_sync_unlock()
192 mutex_unlock(&d->lock); in regmap_irq_sync_unlock()
198 struct regmap *map = d->map; in regmap_irq_enable() local
199 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_enable()
201 d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask; in regmap_irq_enable()
207 struct regmap *map = d->map; in regmap_irq_disable() local
208 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_disable()
210 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; in regmap_irq_disable()
216 struct regmap *map = d->map; in regmap_irq_set_type() local
217 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_type()
218 int reg = irq_data->type_reg_offset / map->reg_stride; in regmap_irq_set_type()
220 if (!(irq_data->type_rising_mask | irq_data->type_falling_mask)) in regmap_irq_set_type()
223 d->type_buf[reg] &= ~(irq_data->type_falling_mask | in regmap_irq_set_type()
224 irq_data->type_rising_mask); in regmap_irq_set_type()
227 d->type_buf[reg] |= irq_data->type_falling_mask; in regmap_irq_set_type()
231 d->type_buf[reg] |= irq_data->type_rising_mask; in regmap_irq_set_type()
235 d->type_buf[reg] |= (irq_data->type_falling_mask | in regmap_irq_set_type()
236 irq_data->type_rising_mask); in regmap_irq_set_type()
240 return -EINVAL; in regmap_irq_set_type()
248 struct regmap *map = d->map; in regmap_irq_set_wake() local
249 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_wake()
252 if (d->wake_buf) in regmap_irq_set_wake()
253 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
254 &= ~irq_data->mask; in regmap_irq_set_wake()
255 d->wake_count++; in regmap_irq_set_wake()
257 if (d->wake_buf) in regmap_irq_set_wake()
258 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
259 |= irq_data->mask; in regmap_irq_set_wake()
260 d->wake_count--; in regmap_irq_set_wake()
278 const struct regmap_irq_chip *chip = data->chip; in regmap_irq_thread()
279 struct regmap *map = data->map; in regmap_irq_thread() local
284 if (chip->handle_pre_irq) in regmap_irq_thread()
285 chip->handle_pre_irq(chip->irq_drv_data); in regmap_irq_thread()
287 if (chip->runtime_pm) { in regmap_irq_thread()
288 ret = pm_runtime_get_sync(map->dev); in regmap_irq_thread()
290 dev_err(map->dev, "IRQ thread failed to resume: %d\n", in regmap_irq_thread()
292 pm_runtime_put(map->dev); in regmap_irq_thread()
301 if (!map->use_single_read && map->reg_stride == 1 && in regmap_irq_thread()
302 data->irq_reg_stride == 1) { in regmap_irq_thread()
303 u8 *buf8 = data->status_reg_buf; in regmap_irq_thread()
304 u16 *buf16 = data->status_reg_buf; in regmap_irq_thread()
305 u32 *buf32 = data->status_reg_buf; in regmap_irq_thread()
307 BUG_ON(!data->status_reg_buf); in regmap_irq_thread()
309 ret = regmap_bulk_read(map, chip->status_base, in regmap_irq_thread()
310 data->status_reg_buf, in regmap_irq_thread()
311 chip->num_regs); in regmap_irq_thread()
313 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_irq_thread()
318 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
319 switch (map->format.val_bytes) { in regmap_irq_thread()
321 data->status_buf[i] = buf8[i]; in regmap_irq_thread()
324 data->status_buf[i] = buf16[i]; in regmap_irq_thread()
327 data->status_buf[i] = buf32[i]; in regmap_irq_thread()
336 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
337 ret = regmap_read(map, chip->status_base + in regmap_irq_thread()
338 (i * map->reg_stride in regmap_irq_thread()
339 * data->irq_reg_stride), in regmap_irq_thread()
340 &data->status_buf[i]); in regmap_irq_thread()
343 dev_err(map->dev, in regmap_irq_thread()
346 if (chip->runtime_pm) in regmap_irq_thread()
347 pm_runtime_put(map->dev); in regmap_irq_thread()
356 * interrupt. We assume that typically few of the interrupts in regmap_irq_thread()
360 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
361 data->status_buf[i] &= ~data->mask_buf[i]; in regmap_irq_thread()
363 if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_irq_thread()
364 reg = chip->ack_base + in regmap_irq_thread()
365 (i * map->reg_stride * data->irq_reg_stride); in regmap_irq_thread()
366 ret = regmap_write(map, reg, data->status_buf[i]); in regmap_irq_thread()
368 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_thread()
373 for (i = 0; i < chip->num_irqs; i++) { in regmap_irq_thread()
374 if (data->status_buf[chip->irqs[i].reg_offset / in regmap_irq_thread()
375 map->reg_stride] & chip->irqs[i].mask) { in regmap_irq_thread()
376 handle_nested_irq(irq_find_mapping(data->domain, i)); in regmap_irq_thread()
381 if (chip->runtime_pm) in regmap_irq_thread()
382 pm_runtime_put(map->dev); in regmap_irq_thread()
385 if (chip->handle_post_irq) in regmap_irq_thread()
386 chip->handle_post_irq(chip->irq_drv_data); in regmap_irq_thread()
397 struct regmap_irq_chip_data *data = h->host_data; in regmap_irq_map()
400 irq_set_chip(virq, &data->irq_chip); in regmap_irq_map()
402 irq_set_parent(virq, data->irq); in regmap_irq_map()
409 .map = regmap_irq_map,
414 * regmap_add_irq_chip() - Use standard regmap IRQ controller handling
416 * @map: The regmap for the device.
418 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
420 * @chip: Configuration for the interrupt controller.
429 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, in regmap_add_irq_chip() argument
435 int ret = -ENOMEM; in regmap_add_irq_chip()
439 if (chip->num_regs <= 0) in regmap_add_irq_chip()
440 return -EINVAL; in regmap_add_irq_chip()
442 for (i = 0; i < chip->num_irqs; i++) { in regmap_add_irq_chip()
443 if (chip->irqs[i].reg_offset % map->reg_stride) in regmap_add_irq_chip()
444 return -EINVAL; in regmap_add_irq_chip()
445 if (chip->irqs[i].reg_offset / map->reg_stride >= in regmap_add_irq_chip()
446 chip->num_regs) in regmap_add_irq_chip()
447 return -EINVAL; in regmap_add_irq_chip()
451 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); in regmap_add_irq_chip()
453 dev_warn(map->dev, "Failed to allocate IRQs: %d\n", in regmap_add_irq_chip()
461 return -ENOMEM; in regmap_add_irq_chip()
463 d->status_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip()
465 if (!d->status_buf) in regmap_add_irq_chip()
468 d->mask_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip()
470 if (!d->mask_buf) in regmap_add_irq_chip()
473 d->mask_buf_def = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip()
475 if (!d->mask_buf_def) in regmap_add_irq_chip()
478 if (chip->wake_base) { in regmap_add_irq_chip()
479 d->wake_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip()
481 if (!d->wake_buf) in regmap_add_irq_chip()
485 if (chip->num_type_reg) { in regmap_add_irq_chip()
486 d->type_buf_def = kcalloc(chip->num_type_reg, in regmap_add_irq_chip()
488 if (!d->type_buf_def) in regmap_add_irq_chip()
491 d->type_buf = kcalloc(chip->num_type_reg, sizeof(unsigned int), in regmap_add_irq_chip()
493 if (!d->type_buf) in regmap_add_irq_chip()
497 d->irq_chip = regmap_irq_chip; in regmap_add_irq_chip()
498 d->irq_chip.name = chip->name; in regmap_add_irq_chip()
499 d->irq = irq; in regmap_add_irq_chip()
500 d->map = map; in regmap_add_irq_chip()
501 d->chip = chip; in regmap_add_irq_chip()
502 d->irq_base = irq_base; in regmap_add_irq_chip()
504 if (chip->irq_reg_stride) in regmap_add_irq_chip()
505 d->irq_reg_stride = chip->irq_reg_stride; in regmap_add_irq_chip()
507 d->irq_reg_stride = 1; in regmap_add_irq_chip()
509 if (chip->type_reg_stride) in regmap_add_irq_chip()
510 d->type_reg_stride = chip->type_reg_stride; in regmap_add_irq_chip()
512 d->type_reg_stride = 1; in regmap_add_irq_chip()
514 if (!map->use_single_read && map->reg_stride == 1 && in regmap_add_irq_chip()
515 d->irq_reg_stride == 1) { in regmap_add_irq_chip()
516 d->status_reg_buf = kmalloc_array(chip->num_regs, in regmap_add_irq_chip()
517 map->format.val_bytes, in regmap_add_irq_chip()
519 if (!d->status_reg_buf) in regmap_add_irq_chip()
523 mutex_init(&d->lock); in regmap_add_irq_chip()
525 for (i = 0; i < chip->num_irqs; i++) in regmap_add_irq_chip()
526 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] in regmap_add_irq_chip()
527 |= chip->irqs[i].mask; in regmap_add_irq_chip()
529 /* Mask all the interrupts by default */ in regmap_add_irq_chip()
530 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip()
531 d->mask_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip()
532 if (!chip->mask_base) in regmap_add_irq_chip()
535 reg = chip->mask_base + in regmap_add_irq_chip()
536 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip()
537 if (chip->mask_invert) in regmap_add_irq_chip()
539 d->mask_buf[i], ~d->mask_buf[i]); in regmap_add_irq_chip()
540 else if (d->chip->unmask_base) { in regmap_add_irq_chip()
541 unmask_offset = d->chip->unmask_base - in regmap_add_irq_chip()
542 d->chip->mask_base; in regmap_add_irq_chip()
545 d->mask_buf[i], in regmap_add_irq_chip()
546 d->mask_buf[i]); in regmap_add_irq_chip()
549 d->mask_buf[i], d->mask_buf[i]); in regmap_add_irq_chip()
551 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip()
556 if (!chip->init_ack_masked) in regmap_add_irq_chip()
560 reg = chip->status_base + in regmap_add_irq_chip()
561 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip()
562 ret = regmap_read(map, reg, &d->status_buf[i]); in regmap_add_irq_chip()
564 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_add_irq_chip()
569 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_add_irq_chip()
570 reg = chip->ack_base + in regmap_add_irq_chip()
571 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip()
572 if (chip->ack_invert) in regmap_add_irq_chip()
573 ret = regmap_write(map, reg, in regmap_add_irq_chip()
574 ~(d->status_buf[i] & d->mask_buf[i])); in regmap_add_irq_chip()
576 ret = regmap_write(map, reg, in regmap_add_irq_chip()
577 d->status_buf[i] & d->mask_buf[i]); in regmap_add_irq_chip()
579 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_add_irq_chip()
587 if (d->wake_buf) { in regmap_add_irq_chip()
588 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip()
589 d->wake_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip()
590 reg = chip->wake_base + in regmap_add_irq_chip()
591 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip()
593 if (chip->wake_invert) in regmap_add_irq_chip()
595 d->mask_buf_def[i], in regmap_add_irq_chip()
599 d->mask_buf_def[i], in regmap_add_irq_chip()
600 d->wake_buf[i]); in regmap_add_irq_chip()
602 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip()
609 if (chip->num_type_reg) { in regmap_add_irq_chip()
610 for (i = 0; i < chip->num_irqs; i++) { in regmap_add_irq_chip()
611 reg = chip->irqs[i].type_reg_offset / map->reg_stride; in regmap_add_irq_chip()
612 d->type_buf_def[reg] |= chip->irqs[i].type_rising_mask | in regmap_add_irq_chip()
613 chip->irqs[i].type_falling_mask; in regmap_add_irq_chip()
615 for (i = 0; i < chip->num_type_reg; ++i) { in regmap_add_irq_chip()
616 if (!d->type_buf_def[i]) in regmap_add_irq_chip()
619 reg = chip->type_base + in regmap_add_irq_chip()
620 (i * map->reg_stride * d->type_reg_stride); in regmap_add_irq_chip()
621 if (chip->type_invert) in regmap_add_irq_chip()
623 d->type_buf_def[i], 0xFF); in regmap_add_irq_chip()
626 d->type_buf_def[i], 0x0); in regmap_add_irq_chip()
628 dev_err(map->dev, in regmap_add_irq_chip()
637 d->domain = irq_domain_add_legacy(map->dev->of_node, in regmap_add_irq_chip()
638 chip->num_irqs, irq_base, 0, in regmap_add_irq_chip()
641 d->domain = irq_domain_add_linear(map->dev->of_node, in regmap_add_irq_chip()
642 chip->num_irqs, in regmap_add_irq_chip()
644 if (!d->domain) { in regmap_add_irq_chip()
645 dev_err(map->dev, "Failed to create IRQ domain\n"); in regmap_add_irq_chip()
646 ret = -ENOMEM; in regmap_add_irq_chip()
652 chip->name, d); in regmap_add_irq_chip()
654 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n", in regmap_add_irq_chip()
655 irq, chip->name, ret); in regmap_add_irq_chip()
666 kfree(d->type_buf); in regmap_add_irq_chip()
667 kfree(d->type_buf_def); in regmap_add_irq_chip()
668 kfree(d->wake_buf); in regmap_add_irq_chip()
669 kfree(d->mask_buf_def); in regmap_add_irq_chip()
670 kfree(d->mask_buf); in regmap_add_irq_chip()
671 kfree(d->status_buf); in regmap_add_irq_chip()
672 kfree(d->status_reg_buf); in regmap_add_irq_chip()
679 * regmap_del_irq_chip() - Stop interrupt handling for a regmap IRQ chip
697 for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) { in regmap_del_irq_chip()
699 if (!d->chip->irqs[hwirq].mask) in regmap_del_irq_chip()
706 virq = irq_find_mapping(d->domain, hwirq); in regmap_del_irq_chip()
711 irq_domain_remove(d->domain); in regmap_del_irq_chip()
712 kfree(d->type_buf); in regmap_del_irq_chip()
713 kfree(d->type_buf_def); in regmap_del_irq_chip()
714 kfree(d->wake_buf); in regmap_del_irq_chip()
715 kfree(d->mask_buf_def); in regmap_del_irq_chip()
716 kfree(d->mask_buf); in regmap_del_irq_chip()
717 kfree(d->status_reg_buf); in regmap_del_irq_chip()
718 kfree(d->status_buf); in regmap_del_irq_chip()
727 regmap_del_irq_chip(d->irq, d); in devm_regmap_irq_chip_release()
743 * devm_regmap_add_irq_chip() - Resource manager regmap_add_irq_chip()
746 * @map: The regmap for the device.
748 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
750 * @chip: Configuration for the interrupt controller.
758 int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, in devm_regmap_add_irq_chip() argument
769 return -ENOMEM; in devm_regmap_add_irq_chip()
771 ret = regmap_add_irq_chip(map, irq, irq_flags, irq_base, in devm_regmap_add_irq_chip()
786 * devm_regmap_del_irq_chip() - Resource managed regmap_del_irq_chip()
799 WARN_ON(irq != data->irq); in devm_regmap_del_irq_chip()
809 * regmap_irq_chip_get_base() - Retrieve interrupt base for a regmap IRQ chip
817 WARN_ON(!data->irq_base); in regmap_irq_chip_get_base()
818 return data->irq_base; in regmap_irq_chip_get_base()
823 * regmap_irq_get_virq() - Map an interrupt on a chip to a virtual IRQ
826 * @irq: index of the interrupt requested in the chip IRQs.
833 if (!data->chip->irqs[irq].mask) in regmap_irq_get_virq()
834 return -EINVAL; in regmap_irq_get_virq()
836 return irq_create_mapping(data->domain, irq); in regmap_irq_get_virq()
841 * regmap_irq_get_domain() - Retrieve the irq_domain for the chip
853 return data->domain; in regmap_irq_get_domain()