Lines Matching full:vc5
113 /* VC5 Input mux settings */
129 /* Supported IDT VC5 models. */
138 /* Structure to describe features of a particular VC5 model */
150 struct vc5_driver_data *vc5; member
225 struct vc5_driver_data *vc5 = in vc5_mux_get_parent() local
230 regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &src); in vc5_mux_get_parent()
239 dev_warn(&vc5->client->dev, in vc5_mux_get_parent()
246 struct vc5_driver_data *vc5 = in vc5_mux_set_parent() local
251 if ((index > 1) || !vc5->clk_mux_ins) in vc5_mux_set_parent()
254 if (vc5->clk_mux_ins == (VC5_MUX_IN_CLKIN | VC5_MUX_IN_XIN)) { in vc5_mux_set_parent()
263 if (vc5->clk_mux_ins == VC5_MUX_IN_XIN) in vc5_mux_set_parent()
265 else if (vc5->clk_mux_ins == VC5_MUX_IN_CLKIN) in vc5_mux_set_parent()
271 return regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, mask, src); in vc5_mux_set_parent()
282 struct vc5_driver_data *vc5 = in vc5_dbl_recalc_rate() local
286 regmap_read(vc5->regmap, VC5_PRIM_SRC_SHDN, &premul); in vc5_dbl_recalc_rate()
305 struct vc5_driver_data *vc5 = in vc5_dbl_set_rate() local
314 regmap_update_bits(vc5->regmap, VC5_PRIM_SRC_SHDN, in vc5_dbl_set_rate()
330 struct vc5_driver_data *vc5 = in vc5_pfd_recalc_rate() local
334 regmap_read(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV, &prediv); in vc5_pfd_recalc_rate()
340 regmap_read(vc5->regmap, VC5_REF_DIVIDER, &div); in vc5_pfd_recalc_rate()
372 struct vc5_driver_data *vc5 = in vc5_pfd_set_rate() local
379 regmap_update_bits(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV, in vc5_pfd_set_rate()
382 regmap_update_bits(vc5->regmap, VC5_REF_DIVIDER, 0xff, 0x00); in vc5_pfd_set_rate()
394 regmap_update_bits(vc5->regmap, VC5_REF_DIVIDER, 0xff, div); in vc5_pfd_set_rate()
395 regmap_update_bits(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV, in vc5_pfd_set_rate()
414 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_pll_recalc_rate() local
418 regmap_bulk_read(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_recalc_rate()
459 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_pll_set_rate() local
468 return regmap_bulk_write(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_set_rate()
481 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_fod_recalc_rate() local
488 regmap_bulk_read(vc5->regmap, VC5_OUT_DIV_INT(hwdata->num, 0), in vc5_fod_recalc_rate()
490 regmap_bulk_read(vc5->regmap, VC5_OUT_DIV_FRAC(hwdata->num, 0), in vc5_fod_recalc_rate()
541 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_fod_set_rate() local
551 regmap_bulk_write(vc5->regmap, VC5_OUT_DIV_FRAC(hwdata->num, 0), in vc5_fod_set_rate()
560 regmap_update_bits(vc5->regmap, VC5_GLOBAL_REGISTER, in vc5_fod_set_rate()
562 regmap_update_bits(vc5->regmap, VC5_GLOBAL_REGISTER, in vc5_fod_set_rate()
577 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_clk_out_prepare() local
588 regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_prepare()
591 ret = regmap_update_bits(vc5->regmap, in vc5_clk_out_prepare()
599 regmap_update_bits(vc5->regmap, VC5_CLK_OUTPUT_CFG(hwdata->num, 1), in vc5_clk_out_prepare()
608 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_clk_out_unprepare() local
611 regmap_update_bits(vc5->regmap, VC5_CLK_OUTPUT_CFG(hwdata->num, 1), in vc5_clk_out_unprepare()
618 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_clk_out_get_parent() local
628 regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src); in vc5_clk_out_get_parent()
640 dev_warn(&vc5->client->dev, in vc5_clk_out_get_parent()
648 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_clk_out_set_parent() local
662 return regmap_update_bits(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), in vc5_clk_out_set_parent()
676 struct vc5_driver_data *vc5 = data; in vc5_of_clk_get() local
679 if (idx >= vc5->chip_info->clk_out_cnt) in vc5_of_clk_get()
682 return &vc5->clk_out[idx].hw; in vc5_of_clk_get()
705 struct vc5_driver_data *vc5; in vc5_probe() local
711 vc5 = devm_kzalloc(&client->dev, sizeof(*vc5), GFP_KERNEL); in vc5_probe()
712 if (vc5 == NULL) in vc5_probe()
715 i2c_set_clientdata(client, vc5); in vc5_probe()
716 vc5->client = client; in vc5_probe()
717 vc5->chip_info = of_device_get_match_data(&client->dev); in vc5_probe()
719 vc5->pin_xin = devm_clk_get(&client->dev, "xin"); in vc5_probe()
720 if (PTR_ERR(vc5->pin_xin) == -EPROBE_DEFER) in vc5_probe()
723 vc5->pin_clkin = devm_clk_get(&client->dev, "clkin"); in vc5_probe()
724 if (PTR_ERR(vc5->pin_clkin) == -EPROBE_DEFER) in vc5_probe()
727 vc5->regmap = devm_regmap_init_i2c(client, &vc5_regmap_config); in vc5_probe()
728 if (IS_ERR(vc5->regmap)) { in vc5_probe()
730 return PTR_ERR(vc5->regmap); in vc5_probe()
736 if (!IS_ERR(vc5->pin_xin)) { in vc5_probe()
737 vc5->clk_mux_ins |= VC5_MUX_IN_XIN; in vc5_probe()
738 parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin); in vc5_probe()
739 } else if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL) { in vc5_probe()
740 vc5->pin_xin = clk_register_fixed_rate(&client->dev, in vc5_probe()
743 if (IS_ERR(vc5->pin_xin)) in vc5_probe()
744 return PTR_ERR(vc5->pin_xin); in vc5_probe()
745 vc5->clk_mux_ins |= VC5_MUX_IN_XIN; in vc5_probe()
746 parent_names[init.num_parents++] = __clk_get_name(vc5->pin_xin); in vc5_probe()
749 if (!IS_ERR(vc5->pin_clkin)) { in vc5_probe()
750 vc5->clk_mux_ins |= VC5_MUX_IN_CLKIN; in vc5_probe()
752 __clk_get_name(vc5->pin_clkin); in vc5_probe()
764 vc5->clk_mux.init = &init; in vc5_probe()
765 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mux); in vc5_probe()
771 if (vc5->chip_info->flags & VC5_HAS_PFD_FREQ_DBL) { in vc5_probe()
779 vc5->clk_mul.init = &init; in vc5_probe()
780 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
793 if (vc5->chip_info->flags & VC5_HAS_PFD_FREQ_DBL) in vc5_probe()
798 vc5->clk_pfd.init = &init; in vc5_probe()
799 ret = devm_clk_hw_register(&client->dev, &vc5->clk_pfd); in vc5_probe()
812 vc5->clk_pll.num = 0; in vc5_probe()
813 vc5->clk_pll.vc5 = vc5; in vc5_probe()
814 vc5->clk_pll.hw.init = &init; in vc5_probe()
815 ret = devm_clk_hw_register(&client->dev, &vc5->clk_pll.hw); in vc5_probe()
822 for (n = 0; n < vc5->chip_info->clk_fod_cnt; n++) { in vc5_probe()
823 idx = vc5_map_index_to_output(vc5->chip_info->model, n); in vc5_probe()
830 vc5->clk_fod[n].num = idx; in vc5_probe()
831 vc5->clk_fod[n].vc5 = vc5; in vc5_probe()
832 vc5->clk_fod[n].hw.init = &init; in vc5_probe()
833 ret = devm_clk_hw_register(&client->dev, &vc5->clk_fod[n].hw); in vc5_probe()
848 vc5->clk_out[0].num = idx; in vc5_probe()
849 vc5->clk_out[0].vc5 = vc5; in vc5_probe()
850 vc5->clk_out[0].hw.init = &init; in vc5_probe()
851 ret = devm_clk_hw_register(&client->dev, &vc5->clk_out[0].hw); in vc5_probe()
859 for (n = 1; n < vc5->chip_info->clk_out_cnt; n++) { in vc5_probe()
860 idx = vc5_map_index_to_output(vc5->chip_info->model, n - 1); in vc5_probe()
873 vc5->clk_out[n].num = idx; in vc5_probe()
874 vc5->clk_out[n].vc5 = vc5; in vc5_probe()
875 vc5->clk_out[n].hw.init = &init; in vc5_probe()
877 &vc5->clk_out[n].hw); in vc5_probe()
885 ret = of_clk_add_hw_provider(client->dev.of_node, vc5_of_clk_get, vc5); in vc5_probe()
894 if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL) in vc5_probe()
895 clk_unregister_fixed_rate(vc5->pin_xin); in vc5_probe()
901 struct vc5_driver_data *vc5 = i2c_get_clientdata(client); in vc5_remove() local
905 if (vc5->chip_info->flags & VC5_HAS_INTERNAL_XTAL) in vc5_remove()
906 clk_unregister_fixed_rate(vc5->pin_xin); in vc5_remove()
968 .name = "vc5",