110 	if (!aad->arm) {  in _mx35_clocks_init()
126 	if (aad->sel)  in _mx35_clocks_init()
127 		clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad->arm);  in _mx35_clocks_init()
129 		clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);  in _mx35_clocks_init()
144 	clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad->ahb);  in _mx35_clocks_init()
262 	clk_register_clkdev(clk[cspi1_gate], "per", "imx35-cspi.0");  in mx35_clocks_init()
263 	clk_register_clkdev(clk[cspi1_gate], "ipg", "imx35-cspi.0");  in mx35_clocks_init()
264 	clk_register_clkdev(clk[cspi2_gate], "per", "imx35-cspi.1");  in mx35_clocks_init()
265 	clk_register_clkdev(clk[cspi2_gate], "ipg", "imx35-cspi.1");  in mx35_clocks_init()
266 	clk_register_clkdev(clk[epit1_gate], NULL, "imx-epit.0");  in mx35_clocks_init()
267 	clk_register_clkdev(clk[epit2_gate], NULL, "imx-epit.1");  in mx35_clocks_init()
268 	clk_register_clkdev(clk[esdhc1_gate], "per", "sdhci-esdhc-imx35.0");  in mx35_clocks_init()
269 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.0");  in mx35_clocks_init()
270 	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.0");  in mx35_clocks_init()
271 	clk_register_clkdev(clk[esdhc2_gate], "per", "sdhci-esdhc-imx35.1");  in mx35_clocks_init()
272 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.1");  in mx35_clocks_init()
273 	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.1");  in mx35_clocks_init()
274 	clk_register_clkdev(clk[esdhc3_gate], "per", "sdhci-esdhc-imx35.2");  in mx35_clocks_init()
275 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.2");  in mx35_clocks_init()
276 	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.2");  in mx35_clocks_init()
278 	clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");  in mx35_clocks_init()
279 	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");  in mx35_clocks_init()
280 	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");  in mx35_clocks_init()
281 	clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");  in mx35_clocks_init()
282 	clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");  in mx35_clocks_init()
283 	clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");  in mx35_clocks_init()
284 	clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");  in mx35_clocks_init()
286 	clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");  in mx35_clocks_init()
288 	clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");  in mx35_clocks_init()
289 	clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");  in mx35_clocks_init()
290 	clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");  in mx35_clocks_init()
291 	/* i.mx35 has the i.mx21 type uart */  in mx35_clocks_init()
292 	clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");  in mx35_clocks_init()
293 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");  in mx35_clocks_init()
294 	clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1");  in mx35_clocks_init()
295 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");  in mx35_clocks_init()
296 	clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2");  in mx35_clocks_init()
297 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");  in mx35_clocks_init()
299 	clk_register_clkdev(clk[ckil], "ref", "imx21-rtc");  in mx35_clocks_init()
300 	clk_register_clkdev(clk[rtc_gate], "ipg", "imx21-rtc");  in mx35_clocks_init()
301 	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");  in mx35_clocks_init()
302 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");  in mx35_clocks_init()
303 	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.0");  in mx35_clocks_init()
304 	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1");  in mx35_clocks_init()
305 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");  in mx35_clocks_init()
306 	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.1");  in mx35_clocks_init()
307 	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");  in mx35_clocks_init()
308 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");  in mx35_clocks_init()
309 	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2");  in mx35_clocks_init()
310 	clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");  in mx35_clocks_init()
311 	clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");  in mx35_clocks_init()
312 	clk_register_clkdev(clk[usbotg_gate], "ahb", "imx-udc-mx27");  in mx35_clocks_init()
313 	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");  in mx35_clocks_init()
314 	clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");  in mx35_clocks_init()
315 	clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");  in mx35_clocks_init()
331 CLK_OF_DECLARE(imx35, "fsl,imx35-ccm", mx35_clocks_init_dt);