Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0+
3 * AmLogic Meson-AXG Clock Controller Driver
13 #include <linux/clk-provider.h>
26 .data = &(struct meson_clk_pll_data){
29 .shift = 0,
34 .shift = 9,
39 .shift = 16,
44 .shift = 0,
49 .shift = 31,
54 .shift = 29,
67 .data = &(struct meson_clk_pll_data){
70 .shift = 0,
75 .shift = 9,
80 .shift = 16,
85 .shift = 31,
90 .shift = 29,
203 .data = &(struct meson_clk_pll_data){
206 .shift = 0,
211 .shift = 9,
216 .shift = 16,
221 .shift = 0,
226 .shift = 31,
231 .shift = 29,
256 .data = &(struct meson_clk_pll_data){
259 .shift = 0,
264 .shift = 9,
269 .shift = 16,
274 .shift = 0,
279 .shift = 31,
284 .shift = 29,
312 .data = &(struct clk_regmap_gate_data){
337 .data = &(struct clk_regmap_gate_data){
354 * b) CCF has a clock hand-off mechanism to make the sure the
373 .data = &(struct clk_regmap_gate_data){
397 .data = &(struct clk_regmap_gate_data){
421 .data = &(struct clk_regmap_gate_data){
434 .data = &(struct clk_regmap_div_data){
436 .shift = 12,
448 .data = &(struct meson_clk_mpll_data){
451 .shift = 0,
456 .shift = 15,
461 .shift = 16,
466 .shift = 0,
481 .data = &(struct clk_regmap_gate_data){
495 .data = &(struct meson_clk_mpll_data){
498 .shift = 0,
503 .shift = 15,
508 .shift = 16,
513 .shift = 1,
528 .data = &(struct clk_regmap_gate_data){
542 .data = &(struct meson_clk_mpll_data){
545 .shift = 0,
550 .shift = 15,
555 .shift = 16,
560 .shift = 25,
565 .shift = 2,
580 .data = &(struct clk_regmap_gate_data){
594 .data = &(struct meson_clk_mpll_data){
597 .shift = 12,
602 .shift = 11,
607 .shift = 2,
612 .shift = 3,
627 .data = &(struct clk_regmap_gate_data){
662 .data = &(struct meson_clk_pll_data){
665 .shift = 0,
670 .shift = 9,
675 .shift = 16,
680 .shift = 6,
685 .shift = 0,
690 .shift = 31,
695 .shift = 29,
711 .data = &(struct clk_regmap_mux_data){
714 .shift = 2,
728 .data = &(struct clk_regmap_mux_data){
731 .shift = 1,
745 .data = &(struct clk_regmap_gate_data){
760 .data = &(struct clk_regmap_gate_data){
780 .data = &(struct clk_regmap_mux_data){
783 .shift = 12,
795 .data = &(struct clk_regmap_div_data){
797 .shift = 0,
810 .data = &(struct clk_regmap_gate_data){
836 .data = &(struct clk_regmap_mux_data){
839 .shift = 25,
851 .data = &(struct clk_regmap_div_data){
853 .shift = 16,
867 .data = &(struct clk_regmap_gate_data){
882 .data = &(struct clk_regmap_mux_data){
885 .shift = 9,
897 .data = &(struct clk_regmap_div_data){
899 .shift = 0,
913 .data = &(struct clk_regmap_gate_data){
934 .data = &(struct clk_regmap_mux_data){
937 .shift = 12,
955 .data = &(struct clk_regmap_div_data){
957 .shift = 0,
970 .data = &(struct clk_regmap_gate_data){
1214 { .compatible = "amlogic,axg-clkc" },
1220 struct device *dev = &pdev->dev; in axg_clkc_probe()
1225 map = syscon_node_to_regmap(of_get_parent(dev->of_node)); in axg_clkc_probe()
1233 axg_clk_regmaps[i]->map = map; in axg_clkc_probe()
1254 .name = "axg-clkc",