1 // SPDX-License-Identifier: GPL-2.0
7 #include "clk-regmap.h"
11 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_gate_endisable()  local
12 	struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);  in clk_regmap_gate_endisable()
13 	int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;  in clk_regmap_gate_endisable()
17 	return regmap_update_bits(clk->map, gate->offset, BIT(gate->bit_idx),  in clk_regmap_gate_endisable()
18 				  set ? BIT(gate->bit_idx) : 0);  in clk_regmap_gate_endisable()
33 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_gate_is_enabled()  local
34 	struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);  in clk_regmap_gate_is_enabled()
37 	regmap_read(clk->map, gate->offset, &val);  in clk_regmap_gate_is_enabled()
38 	if (gate->flags & CLK_GATE_SET_TO_DISABLE)  in clk_regmap_gate_is_enabled()
39 		val ^= BIT(gate->bit_idx);  in clk_regmap_gate_is_enabled()
41 	val &= BIT(gate->bit_idx);  in clk_regmap_gate_is_enabled()
56 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_recalc_rate()  local
57 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_recalc_rate()  local
61 	ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_recalc_rate()
66 	val >>= div->shift;  in clk_regmap_div_recalc_rate()
67 	val &= clk_div_mask(div->width);  in clk_regmap_div_recalc_rate()
68 	return divider_recalc_rate(hw, prate, val, div->table, div->flags,  in clk_regmap_div_recalc_rate()
69 				   div->width);  in clk_regmap_div_recalc_rate()
75 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_round_rate()  local
76 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_round_rate()  local
81 	if (div->flags & CLK_DIVIDER_READ_ONLY) {  in clk_regmap_div_round_rate()
82 		ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_round_rate()
87 		val >>= div->shift;  in clk_regmap_div_round_rate()
88 		val &= clk_div_mask(div->width);  in clk_regmap_div_round_rate()
90 		return divider_ro_round_rate(hw, rate, prate, div->table,  in clk_regmap_div_round_rate()
91 					     div->width, div->flags, val);  in clk_regmap_div_round_rate()
94 	return divider_round_rate(hw, rate, prate, div->table, div->width,  in clk_regmap_div_round_rate()
95 				  div->flags);  in clk_regmap_div_round_rate()
101 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_div_set_rate()  local
102 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_set_rate()  local
106 	ret = divider_get_val(rate, parent_rate, div->table, div->width,  in clk_regmap_div_set_rate()
107 			      div->flags);  in clk_regmap_div_set_rate()
111 	val = (unsigned int)ret << div->shift;  in clk_regmap_div_set_rate()
112 	return regmap_update_bits(clk->map, div->offset,  in clk_regmap_div_set_rate()
113 				  clk_div_mask(div->width) << div->shift, val);  in clk_regmap_div_set_rate()
133 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_get_parent()  local
134 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_get_parent()
138 	ret = regmap_read(clk->map, mux->offset, &val);  in clk_regmap_mux_get_parent()
142 	val >>= mux->shift;  in clk_regmap_mux_get_parent()
143 	val &= mux->mask;  in clk_regmap_mux_get_parent()
144 	return clk_mux_val_to_index(hw, mux->table, mux->flags, val);  in clk_regmap_mux_get_parent()
149 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_set_parent()  local
150 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_set_parent()
151 	unsigned int val = clk_mux_index_to_val(mux->table, mux->flags, index);  in clk_regmap_mux_set_parent()
153 	return regmap_update_bits(clk->map, mux->offset,  in clk_regmap_mux_set_parent()
154 				  mux->mask << mux->shift,  in clk_regmap_mux_set_parent()
155 				  val << mux->shift);  in clk_regmap_mux_set_parent()
161 	struct clk_regmap *clk = to_clk_regmap(hw);  in clk_regmap_mux_determine_rate()  local
162 	struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);  in clk_regmap_mux_determine_rate()
164 	return clk_mux_determine_rate_flags(hw, req, mux->flags);  in clk_regmap_mux_determine_rate()