Lines Matching +full:data +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
17 #include "clk-regmap.h"
179 .data = &(struct meson_clk_pll_data){
182 .shift = 0,
187 .shift = 9,
192 .shift = 16,
197 .shift = 0,
202 .shift = 31,
207 .shift = 29,
231 .data = &(struct meson_clk_pll_data){
234 .shift = 0,
239 .shift = 9,
244 .shift = 0,
249 .shift = 16,
254 .shift = 22,
259 .shift = 18,
264 .shift = 31,
269 .shift = 28,
287 .data = &(struct meson_clk_pll_data){
290 .shift = 0,
295 .shift = 9,
299 * On gxl, there is a register shift due to
306 * On gxl, there is a register shift due to
312 .shift = 0,
317 .shift = 21,
322 .shift = 23,
327 .shift = 19,
332 .shift = 31,
337 .shift = 29,
355 .data = &(struct meson_clk_pll_data){
358 .shift = 0,
363 .shift = 9,
368 .shift = 10,
373 .shift = 31,
378 .shift = 29,
398 .data = &(struct meson_clk_pll_data){
401 .shift = 0,
406 .shift = 9,
411 .shift = 16,
416 .shift = 31,
421 .shift = 29,
446 .data = &(struct meson_clk_pll_data){
449 .shift = 0,
454 .shift = 9,
459 .shift = 16,
464 .shift = 0,
469 .shift = 31,
474 .shift = 29,
501 .data = &(struct clk_regmap_gate_data){
526 .data = &(struct clk_regmap_gate_data){
543 * b) CCF has a clock hand-off mechanism to make the sure the
562 .data = &(struct clk_regmap_gate_data){
586 .data = &(struct clk_regmap_gate_data){
610 .data = &(struct clk_regmap_gate_data){
623 .data = &(struct clk_regmap_div_data){
625 .shift = 12,
637 .data = &(struct meson_clk_mpll_data){
640 .shift = 0,
645 .shift = 15,
650 .shift = 16,
664 .data = &(struct clk_regmap_gate_data){
678 .data = &(struct meson_clk_mpll_data){
681 .shift = 0,
686 .shift = 15,
691 .shift = 16,
705 .data = &(struct clk_regmap_gate_data){
719 .data = &(struct meson_clk_mpll_data){
722 .shift = 0,
727 .shift = 15,
732 .shift = 16,
746 .data = &(struct clk_regmap_gate_data){
766 .data = &(struct clk_regmap_mux_data){
769 .shift = 12,
786 .data = &(struct clk_regmap_div_data){
788 .shift = 0,
801 .data = &(struct clk_regmap_gate_data){
815 .data = &(struct clk_regmap_mux_data){
818 .shift = 9,
830 .data = &(struct clk_regmap_div_data){
832 .shift = 0,
845 .data = &(struct clk_regmap_gate_data){
860 * muxed by a glitch-free switch.
869 .data = &(struct clk_regmap_mux_data){
872 .shift = 9,
889 .data = &(struct clk_regmap_div_data){
891 .shift = 0,
904 .data = &(struct clk_regmap_gate_data){
918 .data = &(struct clk_regmap_mux_data){
921 .shift = 25,
938 .data = &(struct clk_regmap_div_data){
940 .shift = 16,
953 .data = &(struct clk_regmap_gate_data){
971 .data = &(struct clk_regmap_mux_data){
974 .shift = 31,
986 .data = &(struct clk_regmap_mux_data){
989 .shift = 9,
1002 .data = &(struct clk_regmap_div_data) {
1004 .shift = 0,
1018 .data = &(struct clk_regmap_gate_data){
1032 .data = &(struct clk_regmap_mux_data){
1035 .shift = 25,
1048 .data = &(struct clk_regmap_div_data){
1050 .shift = 16,
1064 .data = &(struct clk_regmap_gate_data){
1078 .data = &(struct clk_regmap_mux_data){
1081 .shift = 27,
1089 *The parent is specific to origin of the audio data. Let the
1097 .data = &(struct clk_regmap_div_data){
1099 .shift = 0,
1112 .data = &(struct clk_regmap_gate_data){
1130 .data = &(struct clk_regmap_mux_data){
1133 .shift = 16,
1157 .data = &(struct clk_regmap_mux_data){
1160 .shift = 9,
1172 .data = &(struct clk_regmap_div_data){
1174 .shift = 0,
1188 .data = &(struct clk_regmap_gate_data){
1203 .data = &(struct clk_regmap_mux_data){
1206 .shift = 25,
1218 .data = &(struct clk_regmap_div_data){
1220 .shift = 16,
1234 .data = &(struct clk_regmap_gate_data){
1249 .data = &(struct clk_regmap_mux_data){
1252 .shift = 9,
1264 .data = &(struct clk_regmap_div_data){
1266 .shift = 0,
1280 .data = &(struct clk_regmap_gate_data){
1300 .data = &(struct clk_regmap_mux_data){
1303 .shift = 9,
1319 .data = &(struct clk_regmap_div_data){
1321 .shift = 0,
1334 .data = &(struct clk_regmap_gate_data){
1348 .data = &(struct clk_regmap_mux_data){
1351 .shift = 25,
1367 .data = &(struct clk_regmap_div_data){
1369 .shift = 16,
1382 .data = &(struct clk_regmap_gate_data){
1396 .data = &(struct clk_regmap_mux_data){
1399 .shift = 31,
1421 .data = &(struct clk_regmap_mux_data){
1424 .shift = 9,
1440 .data = &(struct clk_regmap_div_data){
1442 .shift = 0,
1455 .data = &(struct clk_regmap_gate_data){
1469 .data = &(struct clk_regmap_mux_data){
1472 .shift = 25,
1488 .data = &(struct clk_regmap_div_data){
1490 .shift = 16,
1503 .data = &(struct clk_regmap_gate_data){
1517 .data = &(struct clk_regmap_mux_data){
1520 .shift = 31,
1536 .data = &(struct clk_regmap_gate_data){
1556 .data = &(struct clk_regmap_mux_data){
1559 .shift = 9,
1572 .data = &(struct clk_regmap_div_data){
1574 .shift = 0,
1588 .data = &(struct clk_regmap_gate_data){
1602 .data = &(struct clk_regmap_mux_data){
1605 .shift = 25,
1618 .data = &(struct clk_regmap_div_data){
1620 .shift = 16,
1634 .data = &(struct clk_regmap_gate_data){
1655 .data = &(struct clk_regmap_mux_data){
1658 .shift = 12,
1676 .data = &(struct clk_regmap_div_data){
1678 .shift = 0,
1691 .data = &(struct clk_regmap_gate_data){
2309 { .compatible = "amlogic,gxbb-clkc", .data = &gxbb_clkc_data },
2310 { .compatible = "amlogic,gxl-clkc", .data = &gxl_clkc_data },
2319 struct device *dev = &pdev->dev; in gxbb_clkc_probe()
2323 return -EINVAL; in gxbb_clkc_probe()
2326 map = syscon_node_to_regmap(of_get_parent(dev->of_node)); in gxbb_clkc_probe()
2334 gx_clk_regmaps[i]->map = map; in gxbb_clkc_probe()
2337 for (i = 0; i < clkc_data->regmap_clks_count; i++) in gxbb_clkc_probe()
2338 clkc_data->regmap_clks[i]->map = map; in gxbb_clkc_probe()
2341 for (i = 0; i < clkc_data->hw_onecell_data->num; i++) { in gxbb_clkc_probe()
2343 if (!clkc_data->hw_onecell_data->hws[i]) in gxbb_clkc_probe()
2347 clkc_data->hw_onecell_data->hws[i]); in gxbb_clkc_probe()
2355 clkc_data->hw_onecell_data); in gxbb_clkc_probe()
2361 .name = "gxbb-clkc",