Lines Matching full:mux
31 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
36 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
42 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
43 val &= mux->mask; in ti_clk_mux_get_parent()
45 if (mux->table) { in ti_clk_mux_get_parent()
49 if (mux->table[i] == val) in ti_clk_mux_get_parent()
54 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
57 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in ti_clk_mux_get_parent()
68 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_set_parent() local
71 if (mux->table) { in ti_clk_mux_set_parent()
72 index = mux->table[index]; in ti_clk_mux_set_parent()
74 if (mux->flags & CLK_MUX_INDEX_BIT) in ti_clk_mux_set_parent()
77 if (mux->flags & CLK_MUX_INDEX_ONE) in ti_clk_mux_set_parent()
81 if (mux->flags & CLK_MUX_HIWORD_MASK) { in ti_clk_mux_set_parent()
82 val = mux->mask << (mux->shift + 16); in ti_clk_mux_set_parent()
84 val = ti_clk_ll_ops->clk_readl(&mux->reg); in ti_clk_mux_set_parent()
85 val &= ~(mux->mask << mux->shift); in ti_clk_mux_set_parent()
87 val |= index << mux->shift; in ti_clk_mux_set_parent()
88 ti_clk_ll_ops->clk_writel(val, &mux->reg); in ti_clk_mux_set_parent()
89 ti_clk_latch(&mux->reg, mux->latch); in ti_clk_mux_set_parent()
106 struct clk_omap_mux *mux; in _register_mux() local
110 /* allocate the mux */ in _register_mux()
111 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in _register_mux()
112 if (!mux) in _register_mux()
122 memcpy(&mux->reg, reg, sizeof(*reg)); in _register_mux()
123 mux->shift = shift; in _register_mux()
124 mux->mask = mask; in _register_mux()
125 mux->latch = latch; in _register_mux()
126 mux->flags = clk_mux_flags; in _register_mux()
127 mux->table = table; in _register_mux()
128 mux->hw.init = &init; in _register_mux()
130 clk = ti_clk_register(dev, &mux->hw, name); in _register_mux()
133 kfree(mux); in _register_mux()
140 struct ti_clk_mux *mux; in ti_clk_register_mux() local
146 mux = setup->data; in ti_clk_register_mux()
149 mask = mux->num_parents; in ti_clk_register_mux()
150 if (!(mux->flags & CLKF_INDEX_STARTS_AT_ONE)) in ti_clk_register_mux()
154 reg.index = mux->module; in ti_clk_register_mux()
155 reg.offset = mux->reg; in ti_clk_register_mux()
158 if (mux->flags & CLKF_INDEX_STARTS_AT_ONE) in ti_clk_register_mux()
161 if (mux->flags & CLKF_SET_RATE_PARENT) in ti_clk_register_mux()
164 return _register_mux(NULL, setup->name, mux->parents, mux->num_parents, in ti_clk_register_mux()
165 flags, ®, mux->bit_shift, mask, -EINVAL, in ti_clk_register_mux()
170 * of_mux_clk_setup - Setup function for simple mux rate clock
189 pr_err("mux-clock %s must have parents\n", node->name); in of_mux_clk_setup()
228 CLK_OF_DECLARE(mux_clk, "ti,mux-clock", of_mux_clk_setup);
232 struct clk_omap_mux *mux; in ti_clk_build_component_mux() local
238 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in ti_clk_build_component_mux()
239 if (!mux) in ti_clk_build_component_mux()
242 mux->shift = setup->bit_shift; in ti_clk_build_component_mux()
243 mux->latch = -EINVAL; in ti_clk_build_component_mux()
245 mux->reg.index = setup->module; in ti_clk_build_component_mux()
246 mux->reg.offset = setup->reg; in ti_clk_build_component_mux()
249 mux->flags |= CLK_MUX_INDEX_ONE; in ti_clk_build_component_mux()
253 mux->mask = num_parents - 1; in ti_clk_build_component_mux()
254 mux->mask = (1 << fls(mux->mask)) - 1; in ti_clk_build_component_mux()
256 return &mux->hw; in ti_clk_build_component_mux()
261 struct clk_omap_mux *mux; in of_ti_composite_mux_clk_setup() local
265 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in of_ti_composite_mux_clk_setup()
266 if (!mux) in of_ti_composite_mux_clk_setup()
269 if (ti_clk_get_reg_addr(node, 0, &mux->reg)) in of_ti_composite_mux_clk_setup()
273 mux->shift = val; in of_ti_composite_mux_clk_setup()
276 mux->flags |= CLK_MUX_INDEX_ONE; in of_ti_composite_mux_clk_setup()
285 mux->mask = num_parents - 1; in of_ti_composite_mux_clk_setup()
286 mux->mask = (1 << fls(mux->mask)) - 1; in of_ti_composite_mux_clk_setup()
288 if (!ti_clk_add_component(node, &mux->hw, CLK_COMPONENT_TYPE_MUX)) in of_ti_composite_mux_clk_setup()
292 kfree(mux); in of_ti_composite_mux_clk_setup()
294 CLK_OF_DECLARE(ti_composite_mux_clk_setup, "ti,composite-mux-clock",