Lines Matching +full:clk +full:- +full:delay +full:- +full:cycles
25 #include <linux/clk.h>
30 #include <linux/delay.h>
64 static int tegra_timer_set_next_event(unsigned long cycles, in tegra_timer_set_next_event() argument
69 reg = 0x80000000 | ((cycles > 1) ? (cycles-1) : 0); in tegra_timer_set_next_event()
88 u32 reg = 0xC0000000 | ((1000000 / HZ) - 1); in tegra_timer_set_periodic()
114 * tegra_rtc_read - Reads the Tegra RTC registers
127 * tegra_read_persistent_clock64 - Return time from a persistent clock.
130 * 32k sync timer. Convert the cycles elapsed since last read into
142 delta = persistent_ms - last_persistent_ms; in tegra_read_persistent_clock64()
157 evt->event_handler(evt); in tegra_timer_interrupt()
170 struct clk *clk; in tegra20_init_timer() local
177 return -ENXIO; in tegra20_init_timer()
183 return -EINVAL; in tegra20_init_timer()
186 clk = of_clk_get(np, 0); in tegra20_init_timer()
187 if (IS_ERR(clk)) { in tegra20_init_timer()
191 clk_prepare_enable(clk); in tegra20_init_timer()
192 rate = clk_get_rate(clk); in tegra20_init_timer()
240 TIMER_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
244 struct clk *clk; in tegra20_init_rtc() local
249 return -ENXIO; in tegra20_init_rtc()
256 clk = of_clk_get(np, 0); in tegra20_init_rtc()
257 if (IS_ERR(clk)) in tegra20_init_rtc()
258 pr_warn("Unable to get rtc-tegra clock\n"); in tegra20_init_rtc()
260 clk_prepare_enable(clk); in tegra20_init_rtc()
264 TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);