Lines Matching +full:stm32f756 +full:- +full:hash
4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
38 #include <crypto/hash.h>
42 #include <crypto/internal/hash.h>
212 return readl_relaxed(hdev->io_base + offset); in stm32_hash_read()
218 writel_relaxed(value, hdev->io_base + offset); in stm32_hash_write()
225 return readl_relaxed_poll_timeout(hdev->io_base + HASH_SR, status, in stm32_hash_wait_busy()
241 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_key()
244 int keylen = ctx->keylen; in stm32_hash_write_key()
245 void *key = ctx->key; in stm32_hash_write_key()
252 keylen -= 4; in stm32_hash_write_key()
260 return -EINPROGRESS; in stm32_hash_write_key()
268 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_write_ctrl()
269 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_write_ctrl()
274 if (!(hdev->flags & HASH_FLAGS_INIT)) { in stm32_hash_write_ctrl()
275 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_write_ctrl()
292 reg |= (rctx->data_type << HASH_CR_DATATYPE_POS); in stm32_hash_write_ctrl()
294 if (rctx->flags & HASH_FLAGS_HMAC) { in stm32_hash_write_ctrl()
295 hdev->flags |= HASH_FLAGS_HMAC; in stm32_hash_write_ctrl()
297 if (ctx->keylen > HASH_LONG_KEY) in stm32_hash_write_ctrl()
305 hdev->flags |= HASH_FLAGS_INIT; in stm32_hash_write_ctrl()
307 dev_dbg(hdev->dev, "Write Control %x\n", reg); in stm32_hash_write_ctrl()
315 while ((rctx->bufcnt < rctx->buflen) && rctx->total) { in stm32_hash_append_sg()
316 count = min(rctx->sg->length - rctx->offset, rctx->total); in stm32_hash_append_sg()
317 count = min(count, rctx->buflen - rctx->bufcnt); in stm32_hash_append_sg()
320 if ((rctx->sg->length == 0) && !sg_is_last(rctx->sg)) { in stm32_hash_append_sg()
321 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
328 scatterwalk_map_and_copy(rctx->buffer + rctx->bufcnt, rctx->sg, in stm32_hash_append_sg()
329 rctx->offset, count, 0); in stm32_hash_append_sg()
331 rctx->bufcnt += count; in stm32_hash_append_sg()
332 rctx->offset += count; in stm32_hash_append_sg()
333 rctx->total -= count; in stm32_hash_append_sg()
335 if (rctx->offset == rctx->sg->length) { in stm32_hash_append_sg()
336 rctx->sg = sg_next(rctx->sg); in stm32_hash_append_sg()
337 if (rctx->sg) in stm32_hash_append_sg()
338 rctx->offset = 0; in stm32_hash_append_sg()
340 rctx->total = 0; in stm32_hash_append_sg()
353 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_cpu()
357 dev_dbg(hdev->dev, "%s: length: %d, final: %x len32 %i\n", in stm32_hash_xmit_cpu()
360 hdev->flags |= HASH_FLAGS_CPU; in stm32_hash_xmit_cpu()
365 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
367 if ((hdev->flags & HASH_FLAGS_HMAC) && in stm32_hash_xmit_cpu()
368 (!(hdev->flags & HASH_FLAGS_HMAC_KEY))) { in stm32_hash_xmit_cpu()
369 hdev->flags |= HASH_FLAGS_HMAC_KEY; in stm32_hash_xmit_cpu()
372 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
383 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_xmit_cpu()
385 return -ETIMEDOUT; in stm32_hash_xmit_cpu()
388 return -EINPROGRESS; in stm32_hash_xmit_cpu()
396 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_update_cpu()
399 dev_dbg(hdev->dev, "%s flags %lx\n", __func__, rctx->flags); in stm32_hash_update_cpu()
401 final = (rctx->flags & HASH_FLAGS_FINUP); in stm32_hash_update_cpu()
403 while ((rctx->total >= rctx->buflen) || in stm32_hash_update_cpu()
404 (rctx->bufcnt + rctx->total >= rctx->buflen)) { in stm32_hash_update_cpu()
406 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
407 rctx->bufcnt = 0; in stm32_hash_update_cpu()
408 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, 0); in stm32_hash_update_cpu()
414 bufcnt = rctx->bufcnt; in stm32_hash_update_cpu()
415 rctx->bufcnt = 0; in stm32_hash_update_cpu()
416 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, bufcnt, in stm32_hash_update_cpu()
417 (rctx->flags & HASH_FLAGS_FINUP)); in stm32_hash_update_cpu()
431 in_desc = dmaengine_prep_slave_sg(hdev->dma_lch, sg, 1, in stm32_hash_xmit_dma()
435 dev_err(hdev->dev, "dmaengine_prep_slave error\n"); in stm32_hash_xmit_dma()
436 return -ENOMEM; in stm32_hash_xmit_dma()
439 reinit_completion(&hdev->dma_completion); in stm32_hash_xmit_dma()
440 in_desc->callback = stm32_hash_dma_callback; in stm32_hash_xmit_dma()
441 in_desc->callback_param = hdev; in stm32_hash_xmit_dma()
443 hdev->flags |= HASH_FLAGS_FINAL; in stm32_hash_xmit_dma()
444 hdev->flags |= HASH_FLAGS_DMA_ACTIVE; in stm32_hash_xmit_dma()
462 return -ENOMEM; in stm32_hash_xmit_dma()
464 dma_async_issue_pending(hdev->dma_lch); in stm32_hash_xmit_dma()
466 if (!wait_for_completion_interruptible_timeout(&hdev->dma_completion, in stm32_hash_xmit_dma()
468 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
470 if (dma_async_is_tx_complete(hdev->dma_lch, cookie, in stm32_hash_xmit_dma()
472 err = -ETIMEDOUT; in stm32_hash_xmit_dma()
475 dev_err(hdev->dev, "DMA Error %i\n", err); in stm32_hash_xmit_dma()
476 dmaengine_terminate_all(hdev->dma_lch); in stm32_hash_xmit_dma()
480 return -EINPROGRESS; in stm32_hash_xmit_dma()
487 complete(&hdev->dma_completion); in stm32_hash_dma_callback()
489 hdev->flags |= HASH_FLAGS_DMA_READY; in stm32_hash_dma_callback()
494 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_hmac_dma_send()
495 struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); in stm32_hash_hmac_dma_send()
499 if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode == 1)) { in stm32_hash_hmac_dma_send()
502 return -ETIMEDOUT; in stm32_hash_hmac_dma_send()
504 if (!(hdev->flags & HASH_FLAGS_HMAC_KEY)) in stm32_hash_hmac_dma_send()
505 sg_init_one(&rctx->sg_key, ctx->key, in stm32_hash_hmac_dma_send()
506 ALIGN(ctx->keylen, sizeof(u32))); in stm32_hash_hmac_dma_send()
508 rctx->dma_ct = dma_map_sg(hdev->dev, &rctx->sg_key, 1, in stm32_hash_hmac_dma_send()
510 if (rctx->dma_ct == 0) { in stm32_hash_hmac_dma_send()
511 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_hmac_dma_send()
512 return -ENOMEM; in stm32_hash_hmac_dma_send()
515 err = stm32_hash_xmit_dma(hdev, &rctx->sg_key, ctx->keylen, 0); in stm32_hash_hmac_dma_send()
517 dma_unmap_sg(hdev->dev, &rctx->sg_key, 1, DMA_TO_DEVICE); in stm32_hash_hmac_dma_send()
531 dma_conf.dst_addr = hdev->phys_base + HASH_DIN; in stm32_hash_dma_init()
533 dma_conf.src_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
534 dma_conf.dst_maxburst = hdev->dma_maxburst; in stm32_hash_dma_init()
537 hdev->dma_lch = dma_request_slave_channel(hdev->dev, "in"); in stm32_hash_dma_init()
538 if (!hdev->dma_lch) { in stm32_hash_dma_init()
539 dev_err(hdev->dev, "Couldn't acquire a slave DMA channel.\n"); in stm32_hash_dma_init()
540 return -EBUSY; in stm32_hash_dma_init()
543 err = dmaengine_slave_config(hdev->dma_lch, &dma_conf); in stm32_hash_dma_init()
545 dma_release_channel(hdev->dma_lch); in stm32_hash_dma_init()
546 hdev->dma_lch = NULL; in stm32_hash_dma_init()
547 dev_err(hdev->dev, "Couldn't configure DMA slave.\n"); in stm32_hash_dma_init()
551 init_completion(&hdev->dma_completion); in stm32_hash_dma_init()
558 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); in stm32_hash_dma_send()
562 u32 *buffer = (void *)rctx->buffer; in stm32_hash_dma_send()
564 rctx->sg = hdev->req->src; in stm32_hash_dma_send()
565 rctx->total = hdev->req->nbytes; in stm32_hash_dma_send()
567 rctx->nents = sg_nents(rctx->sg); in stm32_hash_dma_send()
569 if (rctx->nents < 0) in stm32_hash_dma_send()
570 return -EINVAL; in stm32_hash_dma_send()
574 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
576 if (err != -EINPROGRESS) in stm32_hash_dma_send()
580 for_each_sg(rctx->sg, tsg, rctx->nents, i) { in stm32_hash_dma_send()
581 len = sg->length; in stm32_hash_dma_send()
585 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
586 len = (ALIGN(sg->length, 16) - 16); in stm32_hash_dma_send()
589 rctx->sg, rctx->nents, in stm32_hash_dma_send()
590 rctx->buffer, sg->length - len, in stm32_hash_dma_send()
591 rctx->total - sg->length + len); in stm32_hash_dma_send()
593 sg->length = len; in stm32_hash_dma_send()
595 if (!(IS_ALIGNED(sg->length, sizeof(u32)))) { in stm32_hash_dma_send()
596 len = sg->length; in stm32_hash_dma_send()
597 sg->length = ALIGN(sg->length, in stm32_hash_dma_send()
603 rctx->dma_ct = dma_map_sg(hdev->dev, sg, 1, in stm32_hash_dma_send()
605 if (rctx->dma_ct == 0) { in stm32_hash_dma_send()
606 dev_err(hdev->dev, "dma_map_sg error\n"); in stm32_hash_dma_send()
607 return -ENOMEM; in stm32_hash_dma_send()
613 dma_unmap_sg(hdev->dev, sg, 1, DMA_TO_DEVICE); in stm32_hash_dma_send()
615 if (err == -ENOMEM) in stm32_hash_dma_send()
619 if (hdev->dma_mode == 1) { in stm32_hash_dma_send()
621 return -ETIMEDOUT; in stm32_hash_dma_send()
629 DIV_ROUND_UP(ncp, sizeof(u32)) - ncp); in stm32_hash_dma_send()
630 writesl(hdev->io_base + HASH_DIN, buffer, in stm32_hash_dma_send()
637 err = -EINPROGRESS; in stm32_hash_dma_send()
640 if (hdev->flags & HASH_FLAGS_HMAC) { in stm32_hash_dma_send()
642 return -ETIMEDOUT; in stm32_hash_dma_send()
654 if (!ctx->hdev) { in stm32_hash_find_dev()
659 ctx->hdev = hdev; in stm32_hash_find_dev()
661 hdev = ctx->hdev; in stm32_hash_find_dev()
676 if (req->nbytes <= HASH_DMA_THRESHOLD) in stm32_hash_dma_aligned_data()
679 if (sg_nents(req->src) > 1) { in stm32_hash_dma_aligned_data()
680 if (hdev->dma_mode == 1) in stm32_hash_dma_aligned_data()
682 for_each_sg(req->src, sg, sg_nents(req->src), i) { in stm32_hash_dma_aligned_data()
683 if ((!IS_ALIGNED(sg->length, sizeof(u32))) && in stm32_hash_dma_aligned_data()
689 if (req->src->offset % 4) in stm32_hash_dma_aligned_data()
702 rctx->hdev = hdev; in stm32_hash_init()
704 rctx->flags = HASH_FLAGS_CPU; in stm32_hash_init()
706 rctx->digcnt = crypto_ahash_digestsize(tfm); in stm32_hash_init()
707 switch (rctx->digcnt) { in stm32_hash_init()
709 rctx->flags |= HASH_FLAGS_MD5; in stm32_hash_init()
712 rctx->flags |= HASH_FLAGS_SHA1; in stm32_hash_init()
715 rctx->flags |= HASH_FLAGS_SHA224; in stm32_hash_init()
718 rctx->flags |= HASH_FLAGS_SHA256; in stm32_hash_init()
721 return -EINVAL; in stm32_hash_init()
724 rctx->bufcnt = 0; in stm32_hash_init()
725 rctx->buflen = HASH_BUFLEN; in stm32_hash_init()
726 rctx->total = 0; in stm32_hash_init()
727 rctx->offset = 0; in stm32_hash_init()
728 rctx->data_type = HASH_DATA_8_BITS; in stm32_hash_init()
730 memset(rctx->buffer, 0, HASH_BUFLEN); in stm32_hash_init()
732 if (ctx->flags & HASH_FLAGS_HMAC) in stm32_hash_init()
733 rctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_init()
735 dev_dbg(hdev->dev, "%s Flags %lx\n", __func__, rctx->flags); in stm32_hash_init()
747 struct ahash_request *req = hdev->req; in stm32_hash_final_req()
750 int buflen = rctx->bufcnt; in stm32_hash_final_req()
752 rctx->bufcnt = 0; in stm32_hash_final_req()
754 if (!(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_final_req()
757 err = stm32_hash_xmit_cpu(hdev, rctx->buffer, buflen, 1); in stm32_hash_final_req()
766 u32 *hash = (u32 *)rctx->digest; in stm32_hash_copy_hash() local
769 switch (rctx->flags & HASH_FLAGS_ALGO_MASK) { in stm32_hash_copy_hash()
787 hash[i] = be32_to_cpu(stm32_hash_read(rctx->hdev, in stm32_hash_copy_hash()
795 if (!req->result) in stm32_hash_finish()
796 return -EINVAL; in stm32_hash_finish()
798 memcpy(req->result, rctx->digest, rctx->digcnt); in stm32_hash_finish()
806 struct stm32_hash_dev *hdev = rctx->hdev; in stm32_hash_finish_req()
808 if (!err && (HASH_FLAGS_FINAL & hdev->flags)) { in stm32_hash_finish_req()
811 hdev->flags &= ~(HASH_FLAGS_FINAL | HASH_FLAGS_CPU | in stm32_hash_finish_req()
817 rctx->flags |= HASH_FLAGS_ERRORS; in stm32_hash_finish_req()
820 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_finish_req()
821 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_finish_req()
823 crypto_finalize_hash_request(hdev->engine, req, err); in stm32_hash_finish_req()
829 pm_runtime_get_sync(hdev->dev); in stm32_hash_hw_init()
831 if (!(HASH_FLAGS_INIT & hdev->flags)) { in stm32_hash_hw_init()
836 hdev->err = 0; in stm32_hash_hw_init()
848 return crypto_transfer_hash_request_to_engine(hdev->engine, req); in stm32_hash_handle_queue()
860 return -ENODEV; in stm32_hash_prepare_req()
862 hdev->req = req; in stm32_hash_prepare_req()
866 dev_dbg(hdev->dev, "processing new req, op: %lu, nbytes %d\n", in stm32_hash_prepare_req()
867 rctx->op, req->nbytes); in stm32_hash_prepare_req()
882 return -ENODEV; in stm32_hash_one_request()
884 hdev->req = req; in stm32_hash_one_request()
888 if (rctx->op == HASH_OP_UPDATE) in stm32_hash_one_request()
890 else if (rctx->op == HASH_OP_FINAL) in stm32_hash_one_request()
893 if (err != -EINPROGRESS) in stm32_hash_one_request()
903 struct stm32_hash_ctx *ctx = crypto_tfm_ctx(req->base.tfm); in stm32_hash_enqueue()
904 struct stm32_hash_dev *hdev = ctx->hdev; in stm32_hash_enqueue()
906 rctx->op = op; in stm32_hash_enqueue()
915 if (!req->nbytes || !(rctx->flags & HASH_FLAGS_CPU)) in stm32_hash_update()
918 rctx->total = req->nbytes; in stm32_hash_update()
919 rctx->sg = req->src; in stm32_hash_update()
920 rctx->offset = 0; in stm32_hash_update()
922 if ((rctx->bufcnt + rctx->total < rctx->buflen)) { in stm32_hash_update()
934 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_final()
946 rctx->flags |= HASH_FLAGS_FINUP; in stm32_hash_finup()
948 if (hdev->dma_lch && stm32_hash_dma_aligned_data(req)) in stm32_hash_finup()
949 rctx->flags &= ~HASH_FLAGS_CPU; in stm32_hash_finup()
953 if (err1 == -EINPROGRESS || err1 == -EBUSY) in stm32_hash_finup()
978 pm_runtime_get_sync(hdev->dev); in stm32_hash_export()
983 rctx->hw_context = kmalloc_array(3 + HASH_CSR_REGISTER_NUMBER, in stm32_hash_export()
987 preg = rctx->hw_context; in stm32_hash_export()
995 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_export()
996 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_export()
1014 preg = rctx->hw_context; in stm32_hash_import()
1016 pm_runtime_get_sync(hdev->dev); in stm32_hash_import()
1027 pm_runtime_mark_last_busy(hdev->dev); in stm32_hash_import()
1028 pm_runtime_put_autosuspend(hdev->dev); in stm32_hash_import()
1030 kfree(rctx->hw_context); in stm32_hash_import()
1041 memcpy(ctx->key, key, keylen); in stm32_hash_setkey()
1042 ctx->keylen = keylen; in stm32_hash_setkey()
1044 return -ENOMEM; in stm32_hash_setkey()
1058 ctx->keylen = 0; in stm32_hash_cra_init_algs()
1061 ctx->flags |= HASH_FLAGS_HMAC; in stm32_hash_cra_init_algs()
1063 ctx->enginectx.op.do_one_request = stm32_hash_one_request; in stm32_hash_cra_init_algs()
1064 ctx->enginectx.op.prepare_request = stm32_hash_prepare_req; in stm32_hash_cra_init_algs()
1065 ctx->enginectx.op.unprepare_request = NULL; in stm32_hash_cra_init_algs()
1098 if (HASH_FLAGS_CPU & hdev->flags) { in stm32_hash_irq_thread()
1099 if (HASH_FLAGS_OUTPUT_READY & hdev->flags) { in stm32_hash_irq_thread()
1100 hdev->flags &= ~HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_thread()
1103 } else if (HASH_FLAGS_DMA_READY & hdev->flags) { in stm32_hash_irq_thread()
1104 if (HASH_FLAGS_DMA_ACTIVE & hdev->flags) { in stm32_hash_irq_thread()
1105 hdev->flags &= ~HASH_FLAGS_DMA_ACTIVE; in stm32_hash_irq_thread()
1114 stm32_hash_finish_req(hdev->req, 0); in stm32_hash_irq_thread()
1128 hdev->flags |= HASH_FLAGS_OUTPUT_READY; in stm32_hash_irq_handler()
1151 .cra_driver_name = "stm32-md5",
1177 .cra_driver_name = "stm32-hmac-md5",
1202 .cra_driver_name = "stm32-sha1",
1228 .cra_driver_name = "stm32-hmac-sha1",
1256 .cra_driver_name = "stm32-sha224",
1282 .cra_driver_name = "stm32-hmac-sha224",
1307 .cra_driver_name = "stm32-sha256",
1333 .cra_driver_name = "stm32-hmac-sha256",
1352 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_register_algs()
1353 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) { in stm32_hash_register_algs()
1355 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1363 dev_err(hdev->dev, "Algo %d : %d failed\n", i, j); in stm32_hash_register_algs()
1364 for (; i--; ) { in stm32_hash_register_algs()
1365 for (; j--;) in stm32_hash_register_algs()
1367 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_register_algs()
1377 for (i = 0; i < hdev->pdata->algs_info_size; i++) { in stm32_hash_unregister_algs()
1378 for (j = 0; j < hdev->pdata->algs_info[i].size; j++) in stm32_hash_unregister_algs()
1380 &hdev->pdata->algs_info[i].algs_list[j]); in stm32_hash_unregister_algs()
1416 .compatible = "st,stm32f456-hash",
1420 .compatible = "st,stm32f756-hash",
1431 hdev->pdata = of_device_get_match_data(dev); in stm32_hash_get_of_match()
1432 if (!hdev->pdata) { in stm32_hash_get_of_match()
1434 return -EINVAL; in stm32_hash_get_of_match()
1437 if (of_property_read_u32(dev->of_node, "dma-maxburst", in stm32_hash_get_of_match()
1438 &hdev->dma_maxburst)) { in stm32_hash_get_of_match()
1439 dev_info(dev, "dma-maxburst not specified, using 0\n"); in stm32_hash_get_of_match()
1440 hdev->dma_maxburst = 0; in stm32_hash_get_of_match()
1449 struct device *dev = &pdev->dev; in stm32_hash_probe()
1455 return -ENOMEM; in stm32_hash_probe()
1458 hdev->io_base = devm_ioremap_resource(dev, res); in stm32_hash_probe()
1459 if (IS_ERR(hdev->io_base)) in stm32_hash_probe()
1460 return PTR_ERR(hdev->io_base); in stm32_hash_probe()
1462 hdev->phys_base = res->start; in stm32_hash_probe()
1482 hdev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_hash_probe()
1483 if (IS_ERR(hdev->clk)) { in stm32_hash_probe()
1484 dev_err(dev, "failed to get clock for hash (%lu)\n", in stm32_hash_probe()
1485 PTR_ERR(hdev->clk)); in stm32_hash_probe()
1486 return PTR_ERR(hdev->clk); in stm32_hash_probe()
1489 ret = clk_prepare_enable(hdev->clk); in stm32_hash_probe()
1491 dev_err(dev, "failed to enable hash clock (%d)\n", ret); in stm32_hash_probe()
1502 hdev->rst = devm_reset_control_get(&pdev->dev, NULL); in stm32_hash_probe()
1503 if (!IS_ERR(hdev->rst)) { in stm32_hash_probe()
1504 reset_control_assert(hdev->rst); in stm32_hash_probe()
1506 reset_control_deassert(hdev->rst); in stm32_hash_probe()
1509 hdev->dev = dev; in stm32_hash_probe()
1518 list_add_tail(&hdev->list, &stm32_hash.dev_list); in stm32_hash_probe()
1522 hdev->engine = crypto_engine_alloc_init(dev, 1); in stm32_hash_probe()
1523 if (!hdev->engine) { in stm32_hash_probe()
1524 ret = -ENOMEM; in stm32_hash_probe()
1528 ret = crypto_engine_start(hdev->engine); in stm32_hash_probe()
1532 hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR); in stm32_hash_probe()
1539 dev_info(dev, "Init HASH done HW ver %x DMA mode %u\n", in stm32_hash_probe()
1540 stm32_hash_read(hdev, HASH_VER), hdev->dma_mode); in stm32_hash_probe()
1548 crypto_engine_exit(hdev->engine); in stm32_hash_probe()
1551 list_del(&hdev->list); in stm32_hash_probe()
1554 if (hdev->dma_lch) in stm32_hash_probe()
1555 dma_release_channel(hdev->dma_lch); in stm32_hash_probe()
1560 clk_disable_unprepare(hdev->clk); in stm32_hash_probe()
1572 return -ENODEV; in stm32_hash_remove()
1574 ret = pm_runtime_get_sync(hdev->dev); in stm32_hash_remove()
1580 crypto_engine_exit(hdev->engine); in stm32_hash_remove()
1583 list_del(&hdev->list); in stm32_hash_remove()
1586 if (hdev->dma_lch) in stm32_hash_remove()
1587 dma_release_channel(hdev->dma_lch); in stm32_hash_remove()
1589 pm_runtime_disable(hdev->dev); in stm32_hash_remove()
1590 pm_runtime_put_noidle(hdev->dev); in stm32_hash_remove()
1592 clk_disable_unprepare(hdev->clk); in stm32_hash_remove()
1602 clk_disable_unprepare(hdev->clk); in stm32_hash_runtime_suspend()
1612 ret = clk_prepare_enable(hdev->clk); in stm32_hash_runtime_resume()
1614 dev_err(hdev->dev, "Failed to prepare_enable clock\n"); in stm32_hash_runtime_resume()
1633 .name = "stm32-hash",