Lines Matching full:sdma
3 // drivers/dma/imx-sdma.c
38 #include <linux/platform_data/dma-imx-sdma.h>
47 /* SDMA registers */
104 * Error bit set in the CCB status field by the SDMA,
145 * 28 Lower WML Event(LWE) SDMA events reg to check for
149 * 29 Higher WML Event(HWE) SDMA events reg to check for
208 * @unused: padding. The SDMA engine expects an array of 128 byte
218 * struct sdma_state_registers - SDMA context for a channel
247 * struct sdma_context_data - sdma context specific to a channel
331 * struct sdma_channel - housekeeping for a SDMA channel
334 * @desc: sdma description including vd and other special member
335 * @sdma: pointer to the SDMA engine for this channel
337 * @direction: transfer type. Needed for setting SDMA script
339 * @peripheral_type: Peripheral type. Needed for setting SDMA script
357 * @data: specific sdma interface structure
363 struct sdma_engine *sdma; member
396 * @magic: "SDMA"
402 * @ram_code_start: offset of SDMA ram image in this firmware image
403 * @ram_code_size: size of SDMA ram image
404 * @script_addrs: Stores the start address of the SDMA scripts
405 * (in SDMA memory space)
559 .name = "imx25-sdma",
562 .name = "imx31-sdma",
565 .name = "imx35-sdma",
568 .name = "imx51-sdma",
571 .name = "imx53-sdma",
574 .name = "imx6q-sdma",
577 .name = "imx7d-sdma",
586 { .compatible = "fsl,imx6q-sdma", .data = &sdma_imx6q, },
587 { .compatible = "fsl,imx53-sdma", .data = &sdma_imx53, },
588 { .compatible = "fsl,imx51-sdma", .data = &sdma_imx51, },
589 { .compatible = "fsl,imx35-sdma", .data = &sdma_imx35, },
590 { .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
591 { .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
592 { .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
602 static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event) in chnenbl_ofs() argument
604 u32 chnenbl0 = sdma->drvdata->chnenbl0; in chnenbl_ofs()
611 struct sdma_engine *sdma = sdmac->sdma; in sdma_config_ownership() local
618 evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
619 mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
620 dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
637 writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
638 writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
639 writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
644 static void sdma_enable_channel(struct sdma_engine *sdma, int channel) in sdma_enable_channel() argument
646 writel(BIT(channel), sdma->regs + SDMA_H_START); in sdma_enable_channel()
652 static int sdma_run_channel0(struct sdma_engine *sdma) in sdma_run_channel0() argument
657 sdma_enable_channel(sdma, 0); in sdma_run_channel0()
659 ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_STATSTOP, in sdma_run_channel0()
662 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); in sdma_run_channel0()
665 if (readl(sdma->regs + SDMA_H_CONFIG) == 0) in sdma_run_channel0()
666 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
671 static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, in sdma_load_script() argument
674 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_script()
687 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_script()
697 ret = sdma_run_channel0(sdma); in sdma_load_script()
699 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_script()
708 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_enable() local
711 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_enable()
713 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_enable()
715 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_enable()
720 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_disable() local
722 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_disable()
725 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_disable()
727 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_disable()
739 struct sdma_engine *sdma = sdmac->sdma; in sdma_start_desc() local
754 sdma->channel_control[channel].base_bd_ptr = desc->bd_phys; in sdma_start_desc()
755 sdma->channel_control[channel].current_bd_ptr = desc->bd_phys; in sdma_start_desc()
756 sdma_enable_channel(sdma, sdmac->channel); in sdma_start_desc()
797 * SDMA transaction status by the time the client tasklet is in sdma_update_channel_loop()
836 struct sdma_engine *sdma = dev_id; in sdma_int_handler() local
839 stat = readl_relaxed(sdma->regs + SDMA_H_INTR); in sdma_int_handler()
840 writel_relaxed(stat, sdma->regs + SDMA_H_INTR); in sdma_int_handler()
846 struct sdma_channel *sdmac = &sdma->channel[channel]; in sdma_int_handler()
869 * sets the pc of SDMA script according to the peripheral type
874 struct sdma_engine *sdma = sdmac->sdma; in sdma_get_pc() local
889 emi_2_emi = sdma->script_addrs->ap_2_ap_addr; in sdma_get_pc()
892 emi_2_per = sdma->script_addrs->bp_2_ap_addr; in sdma_get_pc()
893 per_2_emi = sdma->script_addrs->ap_2_bp_addr; in sdma_get_pc()
896 per_2_emi = sdma->script_addrs->firi_2_mcu_addr; in sdma_get_pc()
897 emi_2_per = sdma->script_addrs->mcu_2_firi_addr; in sdma_get_pc()
900 per_2_emi = sdma->script_addrs->uart_2_mcu_addr; in sdma_get_pc()
901 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
904 per_2_emi = sdma->script_addrs->uartsh_2_mcu_addr; in sdma_get_pc()
905 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
908 per_2_emi = sdma->script_addrs->ata_2_mcu_addr; in sdma_get_pc()
909 emi_2_per = sdma->script_addrs->mcu_2_ata_addr; in sdma_get_pc()
915 per_2_emi = sdma->script_addrs->app_2_mcu_addr; in sdma_get_pc()
916 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
919 per_2_emi = sdma->script_addrs->ssish_2_mcu_addr; in sdma_get_pc()
920 emi_2_per = sdma->script_addrs->mcu_2_ssish_addr; in sdma_get_pc()
928 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
929 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
932 per_2_emi = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
933 emi_2_per = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
934 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
937 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
938 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
939 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
942 per_2_emi = sdma->script_addrs->mshc_2_mcu_addr; in sdma_get_pc()
943 emi_2_per = sdma->script_addrs->mcu_2_mshc_addr; in sdma_get_pc()
946 per_2_emi = sdma->script_addrs->dptc_dvfs_addr; in sdma_get_pc()
949 per_2_emi = sdma->script_addrs->spdif_2_mcu_addr; in sdma_get_pc()
950 emi_2_per = sdma->script_addrs->mcu_2_spdif_addr; in sdma_get_pc()
953 emi_2_per = sdma->script_addrs->ext_mem_2_ipu_addr; in sdma_get_pc()
967 struct sdma_engine *sdma = sdmac->sdma; in sdma_load_context() local
970 struct sdma_context_data *context = sdma->context; in sdma_load_context()
971 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_context()
987 dev_dbg(sdma->dev, "load_address = %d\n", load_address); in sdma_load_context()
988 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level); in sdma_load_context()
989 dev_dbg(sdma->dev, "shp_addr = 0x%08x\n", sdmac->shp_addr); in sdma_load_context()
990 dev_dbg(sdma->dev, "per_addr = 0x%08x\n", sdmac->per_addr); in sdma_load_context()
991 dev_dbg(sdma->dev, "event_mask0 = 0x%08x\n", (u32)sdmac->event_mask[0]); in sdma_load_context()
992 dev_dbg(sdma->dev, "event_mask1 = 0x%08x\n", (u32)sdmac->event_mask[1]); in sdma_load_context()
994 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_context()
1011 bd0->buffer_addr = sdma->context_phys; in sdma_load_context()
1013 ret = sdma_run_channel0(sdma); in sdma_load_context()
1015 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_context()
1028 struct sdma_engine *sdma = sdmac->sdma; in sdma_disable_channel() local
1031 writel_relaxed(BIT(channel), sdma->regs + SDMA_H_STATSTOP); in sdma_disable_channel()
1044 * According to NXP R&D team a delay of one BD SDMA cost time in sdma_channel_terminate_work()
1046 * bit, to ensure SDMA core has really been stopped after SDMA in sdma_channel_terminate_work()
1081 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_watermarklevel_for_p2p() local
1108 if (sdmac->per_address2 >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1109 sdmac->per_address2 <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1112 if (sdmac->per_address >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1113 sdmac->per_address <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1170 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_channel_priority() local
1178 writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel); in sdma_set_channel_priority()
1183 static int sdma_request_channel0(struct sdma_engine *sdma) in sdma_request_channel0() argument
1187 sdma->bd0 = dma_zalloc_coherent(NULL, PAGE_SIZE, &sdma->bd0_phys, in sdma_request_channel0()
1189 if (!sdma->bd0) { in sdma_request_channel0()
1194 sdma->channel_control[0].base_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1195 sdma->channel_control[0].current_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1197 sdma_set_channel_priority(&sdma->channel[0], MXC_SDMA_DEFAULT_PRIORITY); in sdma_request_channel0()
1252 dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n"); in sdma_alloc_chan_resources()
1279 ret = clk_enable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1282 ret = clk_enable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1293 clk_disable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1295 clk_disable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1302 struct sdma_engine *sdma = sdmac->sdma; in sdma_free_chan_resources() local
1318 clk_disable(sdma->clk_ipg); in sdma_free_chan_resources()
1319 clk_disable(sdma->clk_ahb); in sdma_free_chan_resources()
1365 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_memcpy() local
1375 dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n", in sdma_prep_memcpy()
1405 dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n", in sdma_prep_memcpy()
1422 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_slave_sg() local
1434 dev_dbg(sdma->dev, "setting up %d entries for channel %d.\n", in sdma_prep_slave_sg()
1446 dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n", in sdma_prep_slave_sg()
1483 dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n", in sdma_prep_slave_sg()
1506 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_dma_cyclic() local
1512 dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); in sdma_prep_dma_cyclic()
1525 dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n", in sdma_prep_dma_cyclic()
1549 dev_dbg(sdma->dev, "entry %d: count: %zu dma: %#llx %s%s\n", in sdma_prep_dma_cyclic()
1609 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1615 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1676 static void sdma_add_scripts(struct sdma_engine *sdma, in sdma_add_scripts() argument
1680 s32 *saddr_arr = (u32 *)sdma->script_addrs; in sdma_add_scripts()
1684 if (!sdma->script_number) in sdma_add_scripts()
1685 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_add_scripts()
1687 if (sdma->script_number > sizeof(struct sdma_script_start_addrs) in sdma_add_scripts()
1689 dev_err(sdma->dev, in sdma_add_scripts()
1690 "SDMA script number %d not match with firmware.\n", in sdma_add_scripts()
1691 sdma->script_number); in sdma_add_scripts()
1695 for (i = 0; i < sdma->script_number; i++) in sdma_add_scripts()
1702 struct sdma_engine *sdma = context; in sdma_load_firmware() local
1708 dev_info(sdma->dev, "external firmware not found, using ROM firmware\n"); in sdma_load_firmware()
1724 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_load_firmware()
1727 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2; in sdma_load_firmware()
1730 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3; in sdma_load_firmware()
1733 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4; in sdma_load_firmware()
1736 dev_err(sdma->dev, "unknown firmware version\n"); in sdma_load_firmware()
1743 clk_enable(sdma->clk_ipg); in sdma_load_firmware()
1744 clk_enable(sdma->clk_ahb); in sdma_load_firmware()
1745 /* download the RAM image for SDMA */ in sdma_load_firmware()
1746 sdma_load_script(sdma, ram_code, in sdma_load_firmware()
1749 clk_disable(sdma->clk_ipg); in sdma_load_firmware()
1750 clk_disable(sdma->clk_ahb); in sdma_load_firmware()
1752 sdma_add_scripts(sdma, addr); in sdma_load_firmware()
1754 dev_info(sdma->dev, "loaded firmware %d.%d\n", in sdma_load_firmware()
1764 static int sdma_event_remap(struct sdma_engine *sdma) in sdma_event_remap() argument
1766 struct device_node *np = sdma->dev->of_node; in sdma_event_remap()
1770 char propname[] = "fsl,sdma-event-remap"; in sdma_event_remap()
1780 dev_dbg(sdma->dev, "no event needs to be remapped\n"); in sdma_event_remap()
1783 dev_err(sdma->dev, "the property %s must modulo %d\n", in sdma_event_remap()
1791 dev_err(sdma->dev, "failed to get gpr regmap\n"); in sdma_event_remap()
1799 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1806 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1813 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1828 static int sdma_get_firmware(struct sdma_engine *sdma, in sdma_get_firmware() argument
1834 FW_ACTION_HOTPLUG, fw_name, sdma->dev, in sdma_get_firmware()
1835 GFP_KERNEL, sdma, sdma_load_firmware); in sdma_get_firmware()
1840 static int sdma_init(struct sdma_engine *sdma) in sdma_init() argument
1845 ret = clk_enable(sdma->clk_ipg); in sdma_init()
1848 ret = clk_enable(sdma->clk_ahb); in sdma_init()
1852 /* Be sure SDMA has not started yet */ in sdma_init()
1853 writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1855 sdma->channel_control = dma_alloc_coherent(NULL, in sdma_init()
1860 if (!sdma->channel_control) { in sdma_init()
1865 sdma->context = (void *)sdma->channel_control + in sdma_init()
1867 sdma->context_phys = ccb_phys + in sdma_init()
1871 memset(sdma->channel_control, 0, in sdma_init()
1875 for (i = 0; i < sdma->drvdata->num_events; i++) in sdma_init()
1876 writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i)); in sdma_init()
1880 writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4); in sdma_init()
1882 ret = sdma_request_channel0(sdma); in sdma_init()
1886 sdma_config_ownership(&sdma->channel[0], false, true, false); in sdma_init()
1889 writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); in sdma_init()
1893 writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1895 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1898 sdma_set_channel_priority(&sdma->channel[0], 7); in sdma_init()
1900 clk_disable(sdma->clk_ipg); in sdma_init()
1901 clk_disable(sdma->clk_ahb); in sdma_init()
1906 clk_disable(sdma->clk_ahb); in sdma_init()
1908 clk_disable(sdma->clk_ipg); in sdma_init()
1909 dev_err(sdma->dev, "initialisation failed with %d\n", ret); in sdma_init()
1930 struct sdma_engine *sdma = ofdma->of_dma_data; in sdma_xlate() local
1931 dma_cap_mask_t mask = sdma->dma_device.cap_mask; in sdma_xlate()
1965 struct sdma_engine *sdma; in sdma_probe() local
1983 sdma = devm_kzalloc(&pdev->dev, sizeof(*sdma), GFP_KERNEL); in sdma_probe()
1984 if (!sdma) in sdma_probe()
1987 spin_lock_init(&sdma->channel_0_lock); in sdma_probe()
1989 sdma->dev = &pdev->dev; in sdma_probe()
1990 sdma->drvdata = drvdata; in sdma_probe()
1997 sdma->regs = devm_ioremap_resource(&pdev->dev, iores); in sdma_probe()
1998 if (IS_ERR(sdma->regs)) in sdma_probe()
1999 return PTR_ERR(sdma->regs); in sdma_probe()
2001 sdma->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in sdma_probe()
2002 if (IS_ERR(sdma->clk_ipg)) in sdma_probe()
2003 return PTR_ERR(sdma->clk_ipg); in sdma_probe()
2005 sdma->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in sdma_probe()
2006 if (IS_ERR(sdma->clk_ahb)) in sdma_probe()
2007 return PTR_ERR(sdma->clk_ahb); in sdma_probe()
2009 ret = clk_prepare(sdma->clk_ipg); in sdma_probe()
2013 ret = clk_prepare(sdma->clk_ahb); in sdma_probe()
2017 ret = devm_request_irq(&pdev->dev, irq, sdma_int_handler, 0, "sdma", in sdma_probe()
2018 sdma); in sdma_probe()
2022 sdma->irq = irq; in sdma_probe()
2024 sdma->script_addrs = kzalloc(sizeof(*sdma->script_addrs), GFP_KERNEL); in sdma_probe()
2025 if (!sdma->script_addrs) { in sdma_probe()
2031 saddr_arr = (s32 *)sdma->script_addrs; in sdma_probe()
2035 dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask); in sdma_probe()
2036 dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask); in sdma_probe()
2037 dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask); in sdma_probe()
2039 INIT_LIST_HEAD(&sdma->dma_device.channels); in sdma_probe()
2042 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_probe()
2044 sdmac->sdma = sdma; in sdma_probe()
2052 * because we need it internally in the SDMA driver. This also means in sdma_probe()
2053 * that channel 0 in dmaengine counting matches sdma channel 1. in sdma_probe()
2056 vchan_init(&sdmac->vc, &sdma->dma_device); in sdma_probe()
2059 ret = sdma_init(sdma); in sdma_probe()
2063 ret = sdma_event_remap(sdma); in sdma_probe()
2067 if (sdma->drvdata->script_addrs) in sdma_probe()
2068 sdma_add_scripts(sdma, sdma->drvdata->script_addrs); in sdma_probe()
2070 sdma_add_scripts(sdma, pdata->script_addrs); in sdma_probe()
2072 sdma->dma_device.dev = &pdev->dev; in sdma_probe()
2074 sdma->dma_device.device_alloc_chan_resources = sdma_alloc_chan_resources; in sdma_probe()
2075 sdma->dma_device.device_free_chan_resources = sdma_free_chan_resources; in sdma_probe()
2076 sdma->dma_device.device_tx_status = sdma_tx_status; in sdma_probe()
2077 sdma->dma_device.device_prep_slave_sg = sdma_prep_slave_sg; in sdma_probe()
2078 sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic; in sdma_probe()
2079 sdma->dma_device.device_config = sdma_config; in sdma_probe()
2080 sdma->dma_device.device_terminate_all = sdma_disable_channel_async; in sdma_probe()
2081 sdma->dma_device.device_synchronize = sdma_channel_synchronize; in sdma_probe()
2082 sdma->dma_device.src_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2083 sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2084 sdma->dma_device.directions = SDMA_DMA_DIRECTIONS; in sdma_probe()
2085 sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; in sdma_probe()
2086 sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy; in sdma_probe()
2087 sdma->dma_device.device_issue_pending = sdma_issue_pending; in sdma_probe()
2088 sdma->dma_device.dev->dma_parms = &sdma->dma_parms; in sdma_probe()
2089 dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT); in sdma_probe()
2091 platform_set_drvdata(pdev, sdma); in sdma_probe()
2093 ret = dma_async_device_register(&sdma->dma_device); in sdma_probe()
2100 ret = of_dma_controller_register(np, sdma_xlate, sdma); in sdma_probe()
2109 sdma->spba_start_addr = spba_res.start; in sdma_probe()
2110 sdma->spba_end_addr = spba_res.end; in sdma_probe()
2118 * the firmware callback requires a fully functional and allocated sdma in sdma_probe()
2122 ret = sdma_get_firmware(sdma, pdata->fw_name); in sdma_probe()
2131 ret = of_property_read_string(np, "fsl,sdma-ram-script-name", in sdma_probe()
2136 ret = sdma_get_firmware(sdma, fw_name); in sdma_probe()
2145 dma_async_device_unregister(&sdma->dma_device); in sdma_probe()
2147 kfree(sdma->script_addrs); in sdma_probe()
2149 clk_unprepare(sdma->clk_ahb); in sdma_probe()
2151 clk_unprepare(sdma->clk_ipg); in sdma_probe()
2157 struct sdma_engine *sdma = platform_get_drvdata(pdev); in sdma_remove() local
2160 devm_free_irq(&pdev->dev, sdma->irq, sdma); in sdma_remove()
2161 dma_async_device_unregister(&sdma->dma_device); in sdma_remove()
2162 kfree(sdma->script_addrs); in sdma_remove()
2163 clk_unprepare(sdma->clk_ahb); in sdma_remove()
2164 clk_unprepare(sdma->clk_ipg); in sdma_remove()
2167 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_remove()
2179 .name = "imx-sdma",
2190 MODULE_DESCRIPTION("i.MX SDMA driver");
2192 MODULE_FIRMWARE("imx/sdma/sdma-imx6q.bin");
2195 MODULE_FIRMWARE("imx/sdma/sdma-imx7d.bin");