Lines Matching +full:d +full:- +full:phy
2 * Copyright (c) 2013 - 2015 Linaro Ltd.
11 #include <linux/dma-mapping.h>
26 #include "virt-dma.h"
28 #define DRIVER_NAME "k3-dma"
88 struct k3_dma_phy *phy; member
110 struct k3_dma_phy *phy; member
126 static void k3_dma_pause_dma(struct k3_dma_phy *phy, bool on) in k3_dma_pause_dma() argument
131 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
133 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
135 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
137 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
141 static void k3_dma_terminate_chan(struct k3_dma_phy *phy, struct k3_dma_dev *d) in k3_dma_terminate_chan() argument
145 k3_dma_pause_dma(phy, false); in k3_dma_terminate_chan()
147 val = 0x1 << phy->idx; in k3_dma_terminate_chan()
148 writel_relaxed(val, d->base + INT_TC1_RAW); in k3_dma_terminate_chan()
149 writel_relaxed(val, d->base + INT_TC2_RAW); in k3_dma_terminate_chan()
150 writel_relaxed(val, d->base + INT_ERR1_RAW); in k3_dma_terminate_chan()
151 writel_relaxed(val, d->base + INT_ERR2_RAW); in k3_dma_terminate_chan()
154 static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) in k3_dma_set_desc() argument
156 writel_relaxed(hw->lli, phy->base + CX_LLI); in k3_dma_set_desc()
157 writel_relaxed(hw->count, phy->base + CX_CNT0); in k3_dma_set_desc()
158 writel_relaxed(hw->saddr, phy->base + CX_SRC); in k3_dma_set_desc()
159 writel_relaxed(hw->daddr, phy->base + CX_DST); in k3_dma_set_desc()
160 writel_relaxed(AXI_CFG_DEFAULT, phy->base + AXI_CFG); in k3_dma_set_desc()
161 writel_relaxed(hw->config, phy->base + CX_CFG); in k3_dma_set_desc()
164 static u32 k3_dma_get_curr_cnt(struct k3_dma_dev *d, struct k3_dma_phy *phy) in k3_dma_get_curr_cnt() argument
168 cnt = readl_relaxed(d->base + CX_CUR_CNT + phy->idx * 0x10); in k3_dma_get_curr_cnt()
173 static u32 k3_dma_get_curr_lli(struct k3_dma_phy *phy) in k3_dma_get_curr_lli() argument
175 return readl_relaxed(phy->base + CX_LLI); in k3_dma_get_curr_lli()
178 static u32 k3_dma_get_chan_stat(struct k3_dma_dev *d) in k3_dma_get_chan_stat() argument
180 return readl_relaxed(d->base + CH_STAT); in k3_dma_get_chan_stat()
183 static void k3_dma_enable_dma(struct k3_dma_dev *d, bool on) in k3_dma_enable_dma() argument
187 writel_relaxed(0x0, d->base + CH_PRI); in k3_dma_enable_dma()
190 writel_relaxed(0xffff, d->base + INT_TC1_MASK); in k3_dma_enable_dma()
191 writel_relaxed(0xffff, d->base + INT_TC2_MASK); in k3_dma_enable_dma()
192 writel_relaxed(0xffff, d->base + INT_ERR1_MASK); in k3_dma_enable_dma()
193 writel_relaxed(0xffff, d->base + INT_ERR2_MASK); in k3_dma_enable_dma()
196 writel_relaxed(0x0, d->base + INT_TC1_MASK); in k3_dma_enable_dma()
197 writel_relaxed(0x0, d->base + INT_TC2_MASK); in k3_dma_enable_dma()
198 writel_relaxed(0x0, d->base + INT_ERR1_MASK); in k3_dma_enable_dma()
199 writel_relaxed(0x0, d->base + INT_ERR2_MASK); in k3_dma_enable_dma()
205 struct k3_dma_dev *d = (struct k3_dma_dev *)dev_id; in k3_dma_int_handler() local
208 u32 stat = readl_relaxed(d->base + INT_STAT); in k3_dma_int_handler()
209 u32 tc1 = readl_relaxed(d->base + INT_TC1); in k3_dma_int_handler()
210 u32 tc2 = readl_relaxed(d->base + INT_TC2); in k3_dma_int_handler()
211 u32 err1 = readl_relaxed(d->base + INT_ERR1); in k3_dma_int_handler()
212 u32 err2 = readl_relaxed(d->base + INT_ERR2); in k3_dma_int_handler()
221 p = &d->phy[i]; in k3_dma_int_handler()
222 c = p->vchan; in k3_dma_int_handler()
224 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_int_handler()
225 if (p->ds_run != NULL) { in k3_dma_int_handler()
226 vchan_cookie_complete(&p->ds_run->vd); in k3_dma_int_handler()
227 p->ds_done = p->ds_run; in k3_dma_int_handler()
228 p->ds_run = NULL; in k3_dma_int_handler()
230 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_int_handler()
233 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_int_handler()
234 if (p->ds_run != NULL) in k3_dma_int_handler()
235 vchan_cyclic_callback(&p->ds_run->vd); in k3_dma_int_handler()
236 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_int_handler()
241 dev_warn(d->slave.dev, "DMA ERR\n"); in k3_dma_int_handler()
244 writel_relaxed(irq_chan, d->base + INT_TC1_RAW); in k3_dma_int_handler()
245 writel_relaxed(irq_chan, d->base + INT_TC2_RAW); in k3_dma_int_handler()
246 writel_relaxed(err1, d->base + INT_ERR1_RAW); in k3_dma_int_handler()
247 writel_relaxed(err2, d->base + INT_ERR2_RAW); in k3_dma_int_handler()
250 tasklet_schedule(&d->task); in k3_dma_int_handler()
260 struct k3_dma_dev *d = to_k3_dma(c->vc.chan.device); in k3_dma_start_txd() local
261 struct virt_dma_desc *vd = vchan_next_desc(&c->vc); in k3_dma_start_txd()
263 if (!c->phy) in k3_dma_start_txd()
264 return -EAGAIN; in k3_dma_start_txd()
266 if (BIT(c->phy->idx) & k3_dma_get_chan_stat(d)) in k3_dma_start_txd()
267 return -EAGAIN; in k3_dma_start_txd()
270 if (c->phy->ds_run) in k3_dma_start_txd()
271 return -EAGAIN; in k3_dma_start_txd()
277 * fetch and remove request from vc->desc_issued in k3_dma_start_txd()
278 * so vc->desc_issued only contains desc pending in k3_dma_start_txd()
280 list_del(&ds->vd.node); in k3_dma_start_txd()
282 c->phy->ds_run = ds; in k3_dma_start_txd()
283 c->phy->ds_done = NULL; in k3_dma_start_txd()
285 k3_dma_set_desc(c->phy, &ds->desc_hw[0]); in k3_dma_start_txd()
288 c->phy->ds_run = NULL; in k3_dma_start_txd()
289 c->phy->ds_done = NULL; in k3_dma_start_txd()
290 return -EAGAIN; in k3_dma_start_txd()
295 struct k3_dma_dev *d = (struct k3_dma_dev *)arg; in k3_dma_tasklet() local
300 /* check new dma request of running channel in vc->desc_issued */ in k3_dma_tasklet()
301 list_for_each_entry_safe(c, cn, &d->slave.channels, vc.chan.device_node) { in k3_dma_tasklet()
302 spin_lock_irq(&c->vc.lock); in k3_dma_tasklet()
303 p = c->phy; in k3_dma_tasklet()
304 if (p && p->ds_done) { in k3_dma_tasklet()
307 dev_dbg(d->slave.dev, "pchan %u: free\n", p->idx); in k3_dma_tasklet()
309 c->phy = NULL; in k3_dma_tasklet()
310 p->vchan = NULL; in k3_dma_tasklet()
313 spin_unlock_irq(&c->vc.lock); in k3_dma_tasklet()
316 /* check new channel request in d->chan_pending */ in k3_dma_tasklet()
317 spin_lock_irq(&d->lock); in k3_dma_tasklet()
318 for (pch = 0; pch < d->dma_channels; pch++) { in k3_dma_tasklet()
319 p = &d->phy[pch]; in k3_dma_tasklet()
321 if (p->vchan == NULL && !list_empty(&d->chan_pending)) { in k3_dma_tasklet()
322 c = list_first_entry(&d->chan_pending, in k3_dma_tasklet()
324 /* remove from d->chan_pending */ in k3_dma_tasklet()
325 list_del_init(&c->node); in k3_dma_tasklet()
328 p->vchan = c; in k3_dma_tasklet()
329 c->phy = p; in k3_dma_tasklet()
330 dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, &c->vc); in k3_dma_tasklet()
333 spin_unlock_irq(&d->lock); in k3_dma_tasklet()
335 for (pch = 0; pch < d->dma_channels; pch++) { in k3_dma_tasklet()
337 p = &d->phy[pch]; in k3_dma_tasklet()
338 c = p->vchan; in k3_dma_tasklet()
340 spin_lock_irq(&c->vc.lock); in k3_dma_tasklet()
342 spin_unlock_irq(&c->vc.lock); in k3_dma_tasklet()
351 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_free_chan_resources() local
354 spin_lock_irqsave(&d->lock, flags); in k3_dma_free_chan_resources()
355 list_del_init(&c->node); in k3_dma_free_chan_resources()
356 spin_unlock_irqrestore(&d->lock, flags); in k3_dma_free_chan_resources()
358 vchan_free_chan_resources(&c->vc); in k3_dma_free_chan_resources()
359 c->ccfg = 0; in k3_dma_free_chan_resources()
366 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_tx_status() local
373 ret = dma_cookie_status(&c->vc.chan, cookie, state); in k3_dma_tx_status()
377 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_tx_status()
378 p = c->phy; in k3_dma_tx_status()
379 ret = c->status; in k3_dma_tx_status()
385 vd = vchan_find_desc(&c->vc, cookie); in k3_dma_tx_status()
386 if (vd && !c->cyclic) { in k3_dma_tx_status()
387 bytes = container_of(vd, struct k3_dma_desc_sw, vd)->size; in k3_dma_tx_status()
388 } else if ((!p) || (!p->ds_run)) { in k3_dma_tx_status()
391 struct k3_dma_desc_sw *ds = p->ds_run; in k3_dma_tx_status()
394 bytes = k3_dma_get_curr_cnt(d, p); in k3_dma_tx_status()
396 index = ((clli - ds->desc_hw_lli) / in k3_dma_tx_status()
398 for (; index < ds->desc_num; index++) { in k3_dma_tx_status()
399 bytes += ds->desc_hw[index].count; in k3_dma_tx_status()
401 if (!ds->desc_hw[index].lli) in k3_dma_tx_status()
405 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_tx_status()
413 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_issue_pending() local
416 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_issue_pending()
417 /* add request to vc->desc_issued */ in k3_dma_issue_pending()
418 if (vchan_issue_pending(&c->vc)) { in k3_dma_issue_pending()
419 spin_lock(&d->lock); in k3_dma_issue_pending()
420 if (!c->phy) { in k3_dma_issue_pending()
421 if (list_empty(&c->node)) { in k3_dma_issue_pending()
423 list_add_tail(&c->node, &d->chan_pending); in k3_dma_issue_pending()
425 tasklet_schedule(&d->task); in k3_dma_issue_pending()
426 dev_dbg(d->slave.dev, "vchan %p: issued\n", &c->vc); in k3_dma_issue_pending()
429 spin_unlock(&d->lock); in k3_dma_issue_pending()
431 dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", &c->vc); in k3_dma_issue_pending()
432 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_issue_pending()
438 if (num != ds->desc_num - 1) in k3_dma_fill_desc()
439 ds->desc_hw[num].lli = ds->desc_hw_lli + (num + 1) * in k3_dma_fill_desc()
442 ds->desc_hw[num].lli |= CX_LLI_CHAIN_EN; in k3_dma_fill_desc()
443 ds->desc_hw[num].count = len; in k3_dma_fill_desc()
444 ds->desc_hw[num].saddr = src; in k3_dma_fill_desc()
445 ds->desc_hw[num].daddr = dst; in k3_dma_fill_desc()
446 ds->desc_hw[num].config = ccfg; in k3_dma_fill_desc()
454 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_alloc_desc_resource() local
458 dev_dbg(chan->device->dev, "vch %p: sg num %d exceed max %d\n", in k3_dma_alloc_desc_resource()
459 &c->vc, num, lli_limit); in k3_dma_alloc_desc_resource()
467 ds->desc_hw = dma_pool_zalloc(d->pool, GFP_NOWAIT, &ds->desc_hw_lli); in k3_dma_alloc_desc_resource()
468 if (!ds->desc_hw) { in k3_dma_alloc_desc_resource()
469 dev_dbg(chan->device->dev, "vch %p: dma alloc fail\n", &c->vc); in k3_dma_alloc_desc_resource()
473 ds->desc_num = num; in k3_dma_alloc_desc_resource()
495 c->cyclic = 0; in k3_dma_prep_memcpy()
496 ds->size = len; in k3_dma_prep_memcpy()
499 if (!c->ccfg) { in k3_dma_prep_memcpy()
501 c->ccfg = CX_CFG_SRCINCR | CX_CFG_DSTINCR | CX_CFG_EN; in k3_dma_prep_memcpy()
502 c->ccfg |= (0xf << 20) | (0xf << 24); /* burst = 16 */ in k3_dma_prep_memcpy()
503 c->ccfg |= (0x3 << 12) | (0x3 << 16); /* width = 64 bit */ in k3_dma_prep_memcpy()
508 k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg); in k3_dma_prep_memcpy()
510 if (c->dir == DMA_MEM_TO_DEV) { in k3_dma_prep_memcpy()
512 } else if (c->dir == DMA_DEV_TO_MEM) { in k3_dma_prep_memcpy()
518 len -= copy; in k3_dma_prep_memcpy()
521 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_memcpy()
522 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_memcpy()
539 c->cyclic = 0; in k3_dma_prep_slave_sg()
544 num += DIV_ROUND_UP(avail, DMA_MAX_SIZE) - 1; in k3_dma_prep_slave_sg()
562 dst = c->dev_addr; in k3_dma_prep_slave_sg()
564 src = c->dev_addr; in k3_dma_prep_slave_sg()
568 k3_dma_fill_desc(ds, dst, src, len, num++, c->ccfg); in k3_dma_prep_slave_sg()
571 avail -= len; in k3_dma_prep_slave_sg()
575 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_slave_sg()
576 ds->size = total; in k3_dma_prep_slave_sg()
577 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_slave_sg()
594 dev_dbg(chan->device->dev, "%s: buf %pad, dst %pad, buf len %zu, period_len = %zu, dir %d\n", in k3_dma_prep_dma_cyclic()
595 __func__, &buf_addr, &to_k3_chan(chan)->dev_addr, in k3_dma_prep_dma_cyclic()
600 num += DIV_ROUND_UP(avail, modulo) - 1; in k3_dma_prep_dma_cyclic()
606 c->cyclic = 1; in k3_dma_prep_dma_cyclic()
620 dst = c->dev_addr; in k3_dma_prep_dma_cyclic()
622 src = c->dev_addr; in k3_dma_prep_dma_cyclic()
629 since -= period_len; in k3_dma_prep_dma_cyclic()
633 k3_dma_fill_desc(ds, dst, src, len, num++, c->ccfg | en_tc2); in k3_dma_prep_dma_cyclic()
636 avail -= len; in k3_dma_prep_dma_cyclic()
640 ds->desc_hw[num - 1].lli |= ds->desc_hw_lli; in k3_dma_prep_dma_cyclic()
642 ds->size = total; in k3_dma_prep_dma_cyclic()
644 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_dma_cyclic()
655 return -EINVAL; in k3_dma_config()
656 c->dir = cfg->direction; in k3_dma_config()
657 if (c->dir == DMA_DEV_TO_MEM) { in k3_dma_config()
658 c->ccfg = CX_CFG_DSTINCR; in k3_dma_config()
659 c->dev_addr = cfg->src_addr; in k3_dma_config()
660 maxburst = cfg->src_maxburst; in k3_dma_config()
661 width = cfg->src_addr_width; in k3_dma_config()
662 } else if (c->dir == DMA_MEM_TO_DEV) { in k3_dma_config()
663 c->ccfg = CX_CFG_SRCINCR; in k3_dma_config()
664 c->dev_addr = cfg->dst_addr; in k3_dma_config()
665 maxburst = cfg->dst_maxburst; in k3_dma_config()
666 width = cfg->dst_addr_width; in k3_dma_config()
679 c->ccfg |= (val << 12) | (val << 16); in k3_dma_config()
684 val = maxburst - 1; in k3_dma_config()
685 c->ccfg |= (val << 20) | (val << 24); in k3_dma_config()
686 c->ccfg |= CX_CFG_MEM2PER | CX_CFG_EN; in k3_dma_config()
689 c->ccfg |= c->vc.chan.chan_id << 4; in k3_dma_config()
698 struct k3_dma_dev *d = to_k3_dma(vd->tx.chan->device); in k3_dma_free_desc() local
700 dma_pool_free(d->pool, ds->desc_hw, ds->desc_hw_lli); in k3_dma_free_desc()
707 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_terminate_all() local
708 struct k3_dma_phy *p = c->phy; in k3_dma_terminate_all()
712 dev_dbg(d->slave.dev, "vchan %p: terminate all\n", &c->vc); in k3_dma_terminate_all()
715 spin_lock(&d->lock); in k3_dma_terminate_all()
716 list_del_init(&c->node); in k3_dma_terminate_all()
717 spin_unlock(&d->lock); in k3_dma_terminate_all()
720 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_terminate_all()
721 vchan_get_all_descriptors(&c->vc, &head); in k3_dma_terminate_all()
723 /* vchan is assigned to a pchan - stop the channel */ in k3_dma_terminate_all()
724 k3_dma_terminate_chan(p, d); in k3_dma_terminate_all()
725 c->phy = NULL; in k3_dma_terminate_all()
726 p->vchan = NULL; in k3_dma_terminate_all()
727 if (p->ds_run) { in k3_dma_terminate_all()
728 vchan_terminate_vdesc(&p->ds_run->vd); in k3_dma_terminate_all()
729 p->ds_run = NULL; in k3_dma_terminate_all()
731 p->ds_done = NULL; in k3_dma_terminate_all()
733 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_terminate_all()
734 vchan_dma_desc_free_list(&c->vc, &head); in k3_dma_terminate_all()
743 vchan_synchronize(&c->vc); in k3_dma_synchronize()
749 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_transfer_pause() local
750 struct k3_dma_phy *p = c->phy; in k3_dma_transfer_pause()
752 dev_dbg(d->slave.dev, "vchan %p: pause\n", &c->vc); in k3_dma_transfer_pause()
753 if (c->status == DMA_IN_PROGRESS) { in k3_dma_transfer_pause()
754 c->status = DMA_PAUSED; in k3_dma_transfer_pause()
758 spin_lock(&d->lock); in k3_dma_transfer_pause()
759 list_del_init(&c->node); in k3_dma_transfer_pause()
760 spin_unlock(&d->lock); in k3_dma_transfer_pause()
770 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_transfer_resume() local
771 struct k3_dma_phy *p = c->phy; in k3_dma_transfer_resume()
774 dev_dbg(d->slave.dev, "vchan %p: resume\n", &c->vc); in k3_dma_transfer_resume()
775 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_transfer_resume()
776 if (c->status == DMA_PAUSED) { in k3_dma_transfer_resume()
777 c->status = DMA_IN_PROGRESS; in k3_dma_transfer_resume()
780 } else if (!list_empty(&c->vc.desc_issued)) { in k3_dma_transfer_resume()
781 spin_lock(&d->lock); in k3_dma_transfer_resume()
782 list_add_tail(&c->node, &d->chan_pending); in k3_dma_transfer_resume()
783 spin_unlock(&d->lock); in k3_dma_transfer_resume()
786 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_transfer_resume()
792 { .compatible = "hisilicon,k3-dma-1.0", },
800 struct k3_dma_dev *d = ofdma->of_dma_data; in k3_of_dma_simple_xlate() local
801 unsigned int request = dma_spec->args[0]; in k3_of_dma_simple_xlate()
803 if (request >= d->dma_requests) in k3_of_dma_simple_xlate()
806 return dma_get_slave_channel(&(d->chans[request].vc.chan)); in k3_of_dma_simple_xlate()
811 struct k3_dma_dev *d; in k3_dma_probe() local
818 return -EINVAL; in k3_dma_probe()
820 d = devm_kzalloc(&op->dev, sizeof(*d), GFP_KERNEL); in k3_dma_probe()
821 if (!d) in k3_dma_probe()
822 return -ENOMEM; in k3_dma_probe()
824 d->base = devm_ioremap_resource(&op->dev, iores); in k3_dma_probe()
825 if (IS_ERR(d->base)) in k3_dma_probe()
826 return PTR_ERR(d->base); in k3_dma_probe()
828 of_id = of_match_device(k3_pdma_dt_ids, &op->dev); in k3_dma_probe()
830 of_property_read_u32((&op->dev)->of_node, in k3_dma_probe()
831 "dma-channels", &d->dma_channels); in k3_dma_probe()
832 of_property_read_u32((&op->dev)->of_node, in k3_dma_probe()
833 "dma-requests", &d->dma_requests); in k3_dma_probe()
836 d->clk = devm_clk_get(&op->dev, NULL); in k3_dma_probe()
837 if (IS_ERR(d->clk)) { in k3_dma_probe()
838 dev_err(&op->dev, "no dma clk\n"); in k3_dma_probe()
839 return PTR_ERR(d->clk); in k3_dma_probe()
843 ret = devm_request_irq(&op->dev, irq, in k3_dma_probe()
844 k3_dma_int_handler, 0, DRIVER_NAME, d); in k3_dma_probe()
848 d->irq = irq; in k3_dma_probe()
850 /* A DMA memory pool for LLIs, align on 32-byte boundary */ in k3_dma_probe()
851 d->pool = dmam_pool_create(DRIVER_NAME, &op->dev, in k3_dma_probe()
853 if (!d->pool) in k3_dma_probe()
854 return -ENOMEM; in k3_dma_probe()
856 /* init phy channel */ in k3_dma_probe()
857 d->phy = devm_kcalloc(&op->dev, in k3_dma_probe()
858 d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); in k3_dma_probe()
859 if (d->phy == NULL) in k3_dma_probe()
860 return -ENOMEM; in k3_dma_probe()
862 for (i = 0; i < d->dma_channels; i++) { in k3_dma_probe()
863 struct k3_dma_phy *p = &d->phy[i]; in k3_dma_probe()
865 p->idx = i; in k3_dma_probe()
866 p->base = d->base + i * 0x40; in k3_dma_probe()
869 INIT_LIST_HEAD(&d->slave.channels); in k3_dma_probe()
870 dma_cap_set(DMA_SLAVE, d->slave.cap_mask); in k3_dma_probe()
871 dma_cap_set(DMA_MEMCPY, d->slave.cap_mask); in k3_dma_probe()
872 dma_cap_set(DMA_CYCLIC, d->slave.cap_mask); in k3_dma_probe()
873 d->slave.dev = &op->dev; in k3_dma_probe()
874 d->slave.device_free_chan_resources = k3_dma_free_chan_resources; in k3_dma_probe()
875 d->slave.device_tx_status = k3_dma_tx_status; in k3_dma_probe()
876 d->slave.device_prep_dma_memcpy = k3_dma_prep_memcpy; in k3_dma_probe()
877 d->slave.device_prep_slave_sg = k3_dma_prep_slave_sg; in k3_dma_probe()
878 d->slave.device_prep_dma_cyclic = k3_dma_prep_dma_cyclic; in k3_dma_probe()
879 d->slave.device_issue_pending = k3_dma_issue_pending; in k3_dma_probe()
880 d->slave.device_config = k3_dma_config; in k3_dma_probe()
881 d->slave.device_pause = k3_dma_transfer_pause; in k3_dma_probe()
882 d->slave.device_resume = k3_dma_transfer_resume; in k3_dma_probe()
883 d->slave.device_terminate_all = k3_dma_terminate_all; in k3_dma_probe()
884 d->slave.device_synchronize = k3_dma_synchronize; in k3_dma_probe()
885 d->slave.copy_align = DMAENGINE_ALIGN_8_BYTES; in k3_dma_probe()
888 d->chans = devm_kcalloc(&op->dev, in k3_dma_probe()
889 d->dma_requests, sizeof(struct k3_dma_chan), GFP_KERNEL); in k3_dma_probe()
890 if (d->chans == NULL) in k3_dma_probe()
891 return -ENOMEM; in k3_dma_probe()
893 for (i = 0; i < d->dma_requests; i++) { in k3_dma_probe()
894 struct k3_dma_chan *c = &d->chans[i]; in k3_dma_probe()
896 c->status = DMA_IN_PROGRESS; in k3_dma_probe()
897 INIT_LIST_HEAD(&c->node); in k3_dma_probe()
898 c->vc.desc_free = k3_dma_free_desc; in k3_dma_probe()
899 vchan_init(&c->vc, &d->slave); in k3_dma_probe()
903 ret = clk_prepare_enable(d->clk); in k3_dma_probe()
905 dev_err(&op->dev, "clk_prepare_enable failed: %d\n", ret); in k3_dma_probe()
909 k3_dma_enable_dma(d, true); in k3_dma_probe()
911 ret = dma_async_device_register(&d->slave); in k3_dma_probe()
915 ret = of_dma_controller_register((&op->dev)->of_node, in k3_dma_probe()
916 k3_of_dma_simple_xlate, d); in k3_dma_probe()
920 spin_lock_init(&d->lock); in k3_dma_probe()
921 INIT_LIST_HEAD(&d->chan_pending); in k3_dma_probe()
922 tasklet_init(&d->task, k3_dma_tasklet, (unsigned long)d); in k3_dma_probe()
923 platform_set_drvdata(op, d); in k3_dma_probe()
924 dev_info(&op->dev, "initialized\n"); in k3_dma_probe()
929 dma_async_device_unregister(&d->slave); in k3_dma_probe()
931 clk_disable_unprepare(d->clk); in k3_dma_probe()
938 struct k3_dma_dev *d = platform_get_drvdata(op); in k3_dma_remove() local
940 dma_async_device_unregister(&d->slave); in k3_dma_remove()
941 of_dma_controller_free((&op->dev)->of_node); in k3_dma_remove()
943 devm_free_irq(&op->dev, d->irq, d); in k3_dma_remove()
945 list_for_each_entry_safe(c, cn, &d->slave.channels, vc.chan.device_node) { in k3_dma_remove()
946 list_del(&c->vc.chan.device_node); in k3_dma_remove()
947 tasklet_kill(&c->vc.task); in k3_dma_remove()
949 tasklet_kill(&d->task); in k3_dma_remove()
950 clk_disable_unprepare(d->clk); in k3_dma_remove()
957 struct k3_dma_dev *d = dev_get_drvdata(dev); in k3_dma_suspend_dev() local
960 stat = k3_dma_get_chan_stat(d); in k3_dma_suspend_dev()
962 dev_warn(d->slave.dev, in k3_dma_suspend_dev()
963 "chan %d is running fail to suspend\n", stat); in k3_dma_suspend_dev()
964 return -1; in k3_dma_suspend_dev()
966 k3_dma_enable_dma(d, false); in k3_dma_suspend_dev()
967 clk_disable_unprepare(d->clk); in k3_dma_suspend_dev()
973 struct k3_dma_dev *d = dev_get_drvdata(dev); in k3_dma_resume_dev() local
976 ret = clk_prepare_enable(d->clk); in k3_dma_resume_dev()
978 dev_err(d->slave.dev, "clk_prepare_enable failed: %d\n", ret); in k3_dma_resume_dev()
981 k3_dma_enable_dma(d, true); in k3_dma_resume_dev()