Lines Matching full:defines

41 /* SDRAM Controller Interface Data Width Defines */
111 /* SDRAM Controller Interface Data Width Defines */
159 /************* Stratix10 Defines **************/
218 /************************** EDAC Device Defines **************************/
219 /***** General Device Trigger Defines *****/
225 /******* Cyclone5 and Arria5 Defines *******/
226 /* OCRAM ECC Management Group Defines */
235 /* L2 ECC Management Group Defines */
242 /* Arria10 General ECC Block Module Defines */
276 /* ECC Manager Defines */
290 /* Arria 10 L2 ECC Management Group Defines */
307 /* Arria 10 OCRAM ECC Management Group Defines */
310 /* Arria 10 Ethernet ECC Management Group Defines */
313 /* Arria 10 SDMMC ECC Management Group Defines */
319 /************* Stratix10 Defines **************/
321 /* Stratix10 ECC Manager Defines */