Lines Matching +full:6 +full:d
125 #define CH_HASH_MASK_LSB 6
126 #define SLICE_HASH_MASK_LSB 6
212 pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name, in apl_rd_reg()
790 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
791 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
800 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
801 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
810 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
811 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
820 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
821 R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8), R(9),
830 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
831 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
840 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
841 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
850 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
851 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
860 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
861 R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7), R(8),
870 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
871 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
880 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
881 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
890 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
891 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
900 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
901 B(2), R(0), R(1), R(2), R(3), R(4), R(5), R(6), R(7),
940 struct dimm_geometry *d = &dimms[g]; in apl_pmi2mem() local
952 type = d->bits[i + skiprs] & ~0xf; in apl_pmi2mem()
953 idx = d->bits[i + skiprs] & 0xf; in apl_pmi2mem()
961 type = d->bits[i + skiprs] & ~0xf; in apl_pmi2mem()
962 idx = d->bits[i + skiprs] & 0xf; in apl_pmi2mem()
972 bank ^= bank_hash(pmiaddr, idx, d->addrdec); in apl_pmi2mem()
1018 daddr->bank = dnv_get_bit(pmiaddr, dmap[pmiidx].ba0 + 6, 0); in dnv_pmi2mem()
1019 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].ba1 + 6, 1); in dnv_pmi2mem()
1020 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg0 + 6, 2); in dnv_pmi2mem()
1022 daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg1 + 6, 3); in dnv_pmi2mem()
1025 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 0); in dnv_pmi2mem()
1026 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 1); in dnv_pmi2mem()
1029 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2); in dnv_pmi2mem()
1032 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2); in dnv_pmi2mem()
1033 daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 3); in dnv_pmi2mem()
1035 daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 0); in dnv_pmi2mem()
1036 daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 1); in dnv_pmi2mem()
1038 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2); in dnv_pmi2mem()
1040 daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2); in dnv_pmi2mem()
1044 daddr->row = dnv_get_bit(pmiaddr, dmap2[pmiidx].row0 + 6, 0); in dnv_pmi2mem()
1045 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row1 + 6, 1); in dnv_pmi2mem()
1046 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 2); in dnv_pmi2mem()
1047 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row3 + 6, 3); in dnv_pmi2mem()
1048 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row4 + 6, 4); in dnv_pmi2mem()
1049 daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row5 + 6, 5); in dnv_pmi2mem()
1050 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 6); in dnv_pmi2mem()
1051 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 7); in dnv_pmi2mem()
1052 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row8 + 6, 8); in dnv_pmi2mem()
1053 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row9 + 6, 9); in dnv_pmi2mem()
1054 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row10 + 6, 10); in dnv_pmi2mem()
1055 daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row11 + 6, 11); in dnv_pmi2mem()
1056 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row12 + 6, 12); in dnv_pmi2mem()
1057 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row13 + 6, 13); in dnv_pmi2mem()
1059 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row14 + 6, 14); in dnv_pmi2mem()
1061 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row15 + 6, 15); in dnv_pmi2mem()
1063 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row16 + 6, 16); in dnv_pmi2mem()
1065 daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row17 + 6, 17); in dnv_pmi2mem()
1067 daddr->col = dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 3); in dnv_pmi2mem()
1068 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 4); in dnv_pmi2mem()
1069 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca5 + 6, 5); in dnv_pmi2mem()
1070 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca6 + 6, 6); in dnv_pmi2mem()
1071 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca7 + 6, 7); in dnv_pmi2mem()
1072 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca8 + 6, 8); in dnv_pmi2mem()
1073 daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca9 + 6, 9); in dnv_pmi2mem()
1083 pnd2_printk(KERN_INFO, "Unsupported DIMM in channel %d\n", ch); in check_channel()
1086 pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch); in check_channel()
1103 #define DIMMS_PRESENT(d) ((d)->rken0 + (d)->rken1 + (d)->rken2 + (d)->rken3) argument
1107 struct d_cr_drp *d = &drp[ch]; in check_unit() local
1109 if (DIMMS_PRESENT(d) && !ecc_ctrl[ch].eccen) { in check_unit()
1110 pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch); in check_unit()
1145 edac_dbg(0, "SysAddr=%llx PmiAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n", in get_memory_error_data()
1163 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()
1214 "%s%s err_code:%04x:%04x channel:%d DIMM:%d rank:%d row:%d bank:%d col:%d", in pnd2_mce_output_error()
1234 struct d_cr_drp0 *d; in apl_get_dimm_config() local
1244 edac_dbg(0, "No allocated DIMM for channel %d\n", i); in apl_get_dimm_config()
1248 d = &drp0[i]; in apl_get_dimm_config()
1250 if (dimms[g].addrdec == d->addrdec && in apl_get_dimm_config()
1251 dimms[g].dden == d->dden && in apl_get_dimm_config()
1252 dimms[g].dwid == d->dwid) in apl_get_dimm_config()
1256 edac_dbg(0, "Channel %d: unrecognized DIMM\n", i); in apl_get_dimm_config()
1261 capacity = (d->rken0 + d->rken1) * 8 * (1ul << dimms[g].rowbits) * in apl_get_dimm_config()
1263 edac_dbg(0, "Channel %d: %lld MByte DIMM\n", i, capacity >> (20 - 3)); in apl_get_dimm_config()
1266 dimm->dtype = (d->dwid == 0) ? DEV_X8 : DEV_X16; in apl_get_dimm_config()
1269 snprintf(dimm->label, sizeof(dimm->label), "Slice#%d_Chan#%d", i / 2, i % 2); in apl_get_dimm_config()
1281 struct d_cr_drp *d; in dnv_get_dimm_config() local
1312 d = &drp[i]; in dnv_get_dimm_config()
1314 ranks_of_dimm[0] = d->rken0 + d->rken1; in dnv_get_dimm_config()
1316 ranks_of_dimm[1] = d->rken2 + d->rken3; in dnv_get_dimm_config()
1324 edac_dbg(0, "No allocated DIMM for channel %d DIMM %d\n", i, j); in dnv_get_dimm_config()
1329 edac_dbg(0, "Channel %d DIMM %d: %lld MByte DIMM\n", i, j, capacity >> (20 - 3)); in dnv_get_dimm_config()
1332 dimm->dtype = dnv_dtypes[j ? d->dimmdwid0 : d->dimmdwid1]; in dnv_get_dimm_config()
1335 snprintf(dimm->label, sizeof(dimm->label), "Chan#%d_DIMM#%d", i, j); in dnv_get_dimm_config()
1473 "SysAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n", in debugfs_u64_set()
1548 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT, 0, (kernel_ulong_t)&apl_ops },
1549 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_X, 0, (kernel_ulong_t)&dnv_ops },
1583 pnd2_printk(KERN_ERR, "Failed to register device with error %d.\n", rc); in pnd2_init()