2  * GPIO driver for the Diamond Systems GPIO-MM
6  * it under the terms of the GNU General Public License, version 2, as
14  * This driver supports the following Diamond Systems devices: GPIO-MM and
15  * GPIO-MM-12.
36 MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
39  * struct gpiomm_gpio - GPIO device private data structure
45  * @base:	base port address of the GPIO device
51 	unsigned char control[2];
60 	const unsigned int port = offset / 8;  in gpiomm_gpio_get_direction()  local
63 	return !!(gpiommgpio->io_state[port] & mask);  in gpiomm_gpio_get_direction()
72 	const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;  in gpiomm_gpio_direction_input()
76 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_input()
78 	/* Check if configuring Port C */  in gpiomm_gpio_direction_input()
79 	if (io_port == 2 || io_port == 5) {  in gpiomm_gpio_direction_input()
80 		/* Port C can be configured by nibble */  in gpiomm_gpio_direction_input()
82 			gpiommgpio->io_state[io_port] |= 0xF0;  in gpiomm_gpio_direction_input()
83 			gpiommgpio->control[control_port] |= BIT(3);  in gpiomm_gpio_direction_input()
85 			gpiommgpio->io_state[io_port] |= 0x0F;  in gpiomm_gpio_direction_input()
86 			gpiommgpio->control[control_port] |= BIT(0);  in gpiomm_gpio_direction_input()
89 		gpiommgpio->io_state[io_port] |= 0xFF;  in gpiomm_gpio_direction_input()
91 			gpiommgpio->control[control_port] |= BIT(4);  in gpiomm_gpio_direction_input()
93 			gpiommgpio->control[control_port] |= BIT(1);  in gpiomm_gpio_direction_input()
96 	control = BIT(7) | gpiommgpio->control[control_port];  in gpiomm_gpio_direction_input()
99 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_input()
111 	const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;  in gpiomm_gpio_direction_output()
112 	const unsigned int out_port = (io_port > 2) ? io_port + 1 : io_port;  in gpiomm_gpio_direction_output()
116 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_output()
118 	/* Check if configuring Port C */  in gpiomm_gpio_direction_output()
119 	if (io_port == 2 || io_port == 5) {  in gpiomm_gpio_direction_output()
120 		/* Port C can be configured by nibble */  in gpiomm_gpio_direction_output()
122 			gpiommgpio->io_state[io_port] &= 0x0F;  in gpiomm_gpio_direction_output()
123 			gpiommgpio->control[control_port] &= ~BIT(3);  in gpiomm_gpio_direction_output()
125 			gpiommgpio->io_state[io_port] &= 0xF0;  in gpiomm_gpio_direction_output()
126 			gpiommgpio->control[control_port] &= ~BIT(0);  in gpiomm_gpio_direction_output()
129 		gpiommgpio->io_state[io_port] &= 0x00;  in gpiomm_gpio_direction_output()
131 			gpiommgpio->control[control_port] &= ~BIT(4);  in gpiomm_gpio_direction_output()
133 			gpiommgpio->control[control_port] &= ~BIT(1);  in gpiomm_gpio_direction_output()
137 		gpiommgpio->out_state[io_port] |= mask;  in gpiomm_gpio_direction_output()
139 		gpiommgpio->out_state[io_port] &= ~mask;  in gpiomm_gpio_direction_output()
141 	control = BIT(7) | gpiommgpio->control[control_port];  in gpiomm_gpio_direction_output()
144 	outb(gpiommgpio->out_state[io_port], gpiommgpio->base + out_port);  in gpiomm_gpio_direction_output()
146 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_output()
154 	const unsigned int port = offset / 8;  in gpiomm_gpio_get()  local
156 	const unsigned int in_port = (port > 2) ? port + 1 : port;  in gpiomm_gpio_get()
160 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
163 	if (!(gpiommgpio->io_state[port] & mask)) {  in gpiomm_gpio_get()
164 		spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
165 		return -EINVAL;  in gpiomm_gpio_get()
168 	port_state = inb(gpiommgpio->base + in_port);  in gpiomm_gpio_get()
170 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
180 	static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };  in gpiomm_gpio_get_multiple()
186 	const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0);  in gpiomm_gpio_get_multiple()
190 	bitmap_zero(bits, chip->ngpio);  in gpiomm_gpio_get_multiple()
192 	/* get bits are evaluated a gpio port register at a time */  in gpiomm_gpio_get_multiple()
206 			/* no get bits in this port so skip to next one */  in gpiomm_gpio_get_multiple()
210 		/* read bits from current gpio port */  in gpiomm_gpio_get_multiple()
211 		port_state = inb(gpiommgpio->base + ports[i]);  in gpiomm_gpio_get_multiple()
224 	const unsigned int port = offset / 8;  in gpiomm_gpio_set()  local
226 	const unsigned int out_port = (port > 2) ? port + 1 : port;  in gpiomm_gpio_set()
229 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_set()
232 		gpiommgpio->out_state[port] |= mask;  in gpiomm_gpio_set()
234 		gpiommgpio->out_state[port] &= ~mask;  in gpiomm_gpio_set()
236 	outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);  in gpiomm_gpio_set()
238 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_set()
247 	unsigned int port;  in gpiomm_gpio_set_multiple()  local
253 	for (i = 0; i < chip->ngpio; i += gpio_reg_size) {  in gpiomm_gpio_set_multiple()
256 			i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;  in gpiomm_gpio_set_multiple()
260 		port = i / gpio_reg_size;  in gpiomm_gpio_set_multiple()
261 		out_port = (port > 2) ? port + 1 : port;  in gpiomm_gpio_set_multiple()
264 		spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_set_multiple()
267 		gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)];  in gpiomm_gpio_set_multiple()
268 		gpiommgpio->out_state[port] |= bitmask;  in gpiomm_gpio_set_multiple()
269 		outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);  in gpiomm_gpio_set_multiple()
271 		spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_set_multiple()
281 	"Port 1A0", "Port 1A1", "Port 1A2", "Port 1A3", "Port 1A4", "Port 1A5",
282 	"Port 1A6", "Port 1A7", "Port 1B0", "Port 1B1", "Port 1B2", "Port 1B3",
283 	"Port 1B4", "Port 1B5", "Port 1B6", "Port 1B7", "Port 1C0", "Port 1C1",
284 	"Port 1C2", "Port 1C3", "Port 1C4", "Port 1C5", "Port 1C6", "Port 1C7",
285 	"Port 2A0", "Port 2A1", "Port 2A2", "Port 2A3", "Port 2A4", "Port 2A5",
286 	"Port 2A6", "Port 2A7", "Port 2B0", "Port 2B1", "Port 2B2", "Port 2B3",
287 	"Port 2B4", "Port 2B5", "Port 2B6", "Port 2B7", "Port 2C0", "Port 2C1",
288 	"Port 2C2", "Port 2C3", "Port 2C4", "Port 2C5", "Port 2C6", "Port 2C7",
299 		return -ENOMEM;  in gpiomm_probe()
302 		dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",  in gpiomm_probe()
304 		return -EBUSY;  in gpiomm_probe()
307 	gpiommgpio->chip.label = name;  in gpiomm_probe()
308 	gpiommgpio->chip.parent = dev;  in gpiomm_probe()
309 	gpiommgpio->chip.owner = THIS_MODULE;  in gpiomm_probe()
310 	gpiommgpio->chip.base = -1;  in gpiomm_probe()
311 	gpiommgpio->chip.ngpio = GPIOMM_NGPIO;  in gpiomm_probe()
312 	gpiommgpio->chip.names = gpiomm_names;  in gpiomm_probe()
313 	gpiommgpio->chip.get_direction = gpiomm_gpio_get_direction;  in gpiomm_probe()
314 	gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input;  in gpiomm_probe()
315 	gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output;  in gpiomm_probe()
316 	gpiommgpio->chip.get = gpiomm_gpio_get;  in gpiomm_probe()
317 	gpiommgpio->chip.get_multiple = gpiomm_gpio_get_multiple;  in gpiomm_probe()
318 	gpiommgpio->chip.set = gpiomm_gpio_set;  in gpiomm_probe()
319 	gpiommgpio->chip.set_multiple = gpiomm_gpio_set_multiple;  in gpiomm_probe()
320 	gpiommgpio->base = base[id];  in gpiomm_probe()
322 	spin_lock_init(&gpiommgpio->lock);  in gpiomm_probe()
324 	err = devm_gpiochip_add_data(dev, &gpiommgpio->chip, gpiommgpio);  in gpiomm_probe()
334 	outb(0x00, base[id] + 2);  in gpiomm_probe()
346 		.name = "gpio-mm"
353 MODULE_DESCRIPTION("Diamond Systems GPIO-MM GPIO driver");