49 	unsigned int		line;  member
57 	struct msix_entry	*msix_entries;	/* per line MSI-X */
58 	struct thunderx_line	*line_entries;	/* per line irq info */
65 static unsigned int bit_cfg_reg(unsigned int line)  in bit_cfg_reg()  argument
67 	return 8 * line + GPIO_BIT_CFG;  in bit_cfg_reg()
70 static unsigned int intr_reg(unsigned int line)  in intr_reg()  argument
72 	return 8 * line + GPIO_INTR;  in intr_reg()
76 					 unsigned int line)  in thunderx_gpio_is_gpio_nowarn()  argument
78 	u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_is_gpio_nowarn()
88 				  unsigned int line)  in thunderx_gpio_is_gpio()  argument
90 	bool rv = thunderx_gpio_is_gpio_nowarn(txgpio, line);  in thunderx_gpio_is_gpio()
92 	WARN_RATELIMIT(!rv, "Pin %d not available for GPIO\n", line);  in thunderx_gpio_is_gpio()
97 static int thunderx_gpio_request(struct gpio_chip *chip, unsigned int line)  in thunderx_gpio_request()  argument
101 	return thunderx_gpio_is_gpio(txgpio, line) ? 0 : -EIO;  in thunderx_gpio_request()
104 static int thunderx_gpio_dir_in(struct gpio_chip *chip, unsigned int line)  in thunderx_gpio_dir_in()  argument
108 	if (!thunderx_gpio_is_gpio(txgpio, line))  in thunderx_gpio_dir_in()
112 	clear_bit(line, txgpio->invert_mask);  in thunderx_gpio_dir_in()
113 	clear_bit(line, txgpio->od_mask);  in thunderx_gpio_dir_in()
114 	writeq(txgpio->line_entries[line].fil_bits,  in thunderx_gpio_dir_in()
115 	       txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_dir_in()
120 static void thunderx_gpio_set(struct gpio_chip *chip, unsigned int line,  in thunderx_gpio_set()  argument
124 	int bank = line / 64;  in thunderx_gpio_set()
125 	int bank_bit = line % 64;  in thunderx_gpio_set()
133 static int thunderx_gpio_dir_out(struct gpio_chip *chip, unsigned int line,  in thunderx_gpio_dir_out()  argument
137 	u64 bit_cfg = txgpio->line_entries[line].fil_bits | GPIO_BIT_CFG_TX_OE;  in thunderx_gpio_dir_out()
139 	if (!thunderx_gpio_is_gpio(txgpio, line))  in thunderx_gpio_dir_out()
144 	thunderx_gpio_set(chip, line, value);  in thunderx_gpio_dir_out()
146 	if (test_bit(line, txgpio->invert_mask))  in thunderx_gpio_dir_out()
149 	if (test_bit(line, txgpio->od_mask))  in thunderx_gpio_dir_out()
152 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_dir_out()
158 static int thunderx_gpio_get_direction(struct gpio_chip *chip, unsigned int line)  in thunderx_gpio_get_direction()  argument
163 	if (!thunderx_gpio_is_gpio_nowarn(txgpio, line))  in thunderx_gpio_get_direction()
171 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_get_direction()
177 				    unsigned int line,  in thunderx_gpio_set_config()  argument
183 	int bank = line / 64;  in thunderx_gpio_set_config()
184 	int bank_bit = line % 64;  in thunderx_gpio_set_config()
189 	if (!thunderx_gpio_is_gpio(txgpio, line))  in thunderx_gpio_set_config()
193 	orig_invert = test_bit(line, txgpio->invert_mask);  in thunderx_gpio_set_config()
195 	orig_od = test_bit(line, txgpio->od_mask);  in thunderx_gpio_set_config()
198 	bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_set_config()
206 		set_bit(line, txgpio->invert_mask);  in thunderx_gpio_set_config()
208 		set_bit(line, txgpio->od_mask);  in thunderx_gpio_set_config()
213 		clear_bit(line, txgpio->invert_mask);  in thunderx_gpio_set_config()
215 		clear_bit(line, txgpio->od_mask);  in thunderx_gpio_set_config()
232 		txgpio->line_entries[line].fil_bits =  in thunderx_gpio_set_config()
236 		bit_cfg |= txgpio->line_entries[line].fil_bits;  in thunderx_gpio_set_config()
237 		writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));  in thunderx_gpio_set_config()
251 		ret = thunderx_gpio_dir_out(chip, line, orig_dat ^ new_invert);  in thunderx_gpio_set_config()
256 static int thunderx_gpio_get(struct gpio_chip *chip, unsigned int line)  in thunderx_gpio_get()  argument
259 	int bank = line / 64;  in thunderx_gpio_get()
260 	int bank_bit = line % 64;  in thunderx_gpio_get()
264 	if (test_bit(line, txgpio->invert_mask))  in thunderx_gpio_get()
291 	       txline->txgpio->register_base + intr_reg(txline->line));  in thunderx_gpio_irq_ack()
299 	       txline->txgpio->register_base + intr_reg(txline->line));  in thunderx_gpio_irq_mask()
307 	       txline->txgpio->register_base + intr_reg(txline->line));  in thunderx_gpio_irq_mask_ack()
315 	       txline->txgpio->register_base + intr_reg(txline->line));  in thunderx_gpio_irq_unmask()
339 		set_bit(txline->line, txgpio->invert_mask);  in thunderx_gpio_irq_set_type()
341 		clear_bit(txline->line, txgpio->invert_mask);  in thunderx_gpio_irq_set_type()
343 	clear_bit(txline->line, txgpio->od_mask);  in thunderx_gpio_irq_set_type()
344 	writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));  in thunderx_gpio_irq_set_type()
369 	r = gpiochip_lock_as_irq(&txgpio->chip, txline->line);  in thunderx_gpio_irq_request_resources()
381 	gpiochip_unlock_as_irq(&txgpio->chip, txline->line);  in thunderx_gpio_irq_request_resources()
394 	gpiochip_unlock_as_irq(&txgpio->chip, txline->line);  in thunderx_gpio_irq_release_resources()
441 	return irq_domain_set_hwirq_and_chip(d, virq, txline->line,  in thunderx_gpio_irq_alloc()
528 		txgpio->line_entries[i].line = i;  in thunderx_gpio_probe()
562 	/* Push on irq_data and the domain for each line. */  in thunderx_gpio_probe()