44 	raw_spinlock_t		lock;  member
50 static int zx_direction_input(struct gpio_chip *gc, unsigned offset)  in zx_direction_input()  argument
56 	if (offset >= gc->ngpio)  in zx_direction_input()
57 		return -EINVAL;  in zx_direction_input()
59 	raw_spin_lock_irqsave(&chip->lock, flags);  in zx_direction_input()
60 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_input()
61 	gpiodir &= ~BIT(offset);  in zx_direction_input()
62 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_input()
63 	raw_spin_unlock_irqrestore(&chip->lock, flags);  in zx_direction_input()
68 static int zx_direction_output(struct gpio_chip *gc, unsigned offset,  in zx_direction_output()  argument
75 	if (offset >= gc->ngpio)  in zx_direction_output()
76 		return -EINVAL;  in zx_direction_output()
78 	raw_spin_lock_irqsave(&chip->lock, flags);  in zx_direction_output()
79 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_output()
80 	gpiodir |= BIT(offset);  in zx_direction_output()
81 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_output()
84 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_direction_output()
86 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_direction_output()
87 	raw_spin_unlock_irqrestore(&chip->lock, flags);  in zx_direction_output()
92 static int zx_get_value(struct gpio_chip *gc, unsigned offset)  in zx_get_value()  argument
96 	return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset));  in zx_get_value()
99 static void zx_set_value(struct gpio_chip *gc, unsigned offset, int value)  in zx_set_value()  argument
104 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_set_value()
106 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_set_value()
113 	int offset = irqd_to_hwirq(d);  in zx_irq_type()  local
116 	u16 bit = BIT(offset);  in zx_irq_type()
118 	if (offset < 0 || offset >= ZX_GPIO_NR)  in zx_irq_type()
119 		return -EINVAL;  in zx_irq_type()
121 	raw_spin_lock_irqsave(&chip->lock, flags);  in zx_irq_type()
123 	gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);  in zx_irq_type()
124 	gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);  in zx_irq_type()
125 	gpioi_epos = readw_relaxed(chip->base + ZX_GPIO_IEP);  in zx_irq_type()
126 	gpioi_eneg = readw_relaxed(chip->base + ZX_GPIO_IEN);  in zx_irq_type()
150 	writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);  in zx_irq_type()
151 	writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);  in zx_irq_type()
152 	writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);  in zx_irq_type()
153 	writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);  in zx_irq_type()
154 	raw_spin_unlock_irqrestore(&chip->lock, flags);  in zx_irq_type()
162 	int offset;  in zx_irq_handler()  local
169 	pending = readw_relaxed(chip->base + ZX_GPIO_MIS);  in zx_irq_handler()
170 	writew_relaxed(pending, chip->base + ZX_GPIO_IC);  in zx_irq_handler()
172 		for_each_set_bit(offset, &pending, ZX_GPIO_NR)  in zx_irq_handler()
173 			generic_handle_irq(irq_find_mapping(gc->irq.domain,  in zx_irq_handler()
174 							    offset));  in zx_irq_handler()
187 	raw_spin_lock(&chip->lock);  in zx_irq_mask()
188 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;  in zx_irq_mask()
189 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_mask()
190 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;  in zx_irq_mask()
191 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_mask()
192 	raw_spin_unlock(&chip->lock);  in zx_irq_mask()
202 	raw_spin_lock(&chip->lock);  in zx_irq_unmask()
203 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;  in zx_irq_unmask()
204 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_unmask()
205 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;  in zx_irq_unmask()
206 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_unmask()
207 	raw_spin_unlock(&chip->lock);  in zx_irq_unmask()
211 	.name		= "zx-gpio",
219 	struct device *dev = &pdev->dev;  in zx_gpio_probe()
226 		return -ENOMEM;  in zx_gpio_probe()
229 	chip->base = devm_ioremap_resource(dev, res);  in zx_gpio_probe()
230 	if (IS_ERR(chip->base))  in zx_gpio_probe()
231 		return PTR_ERR(chip->base);  in zx_gpio_probe()
233 	raw_spin_lock_init(&chip->lock);  in zx_gpio_probe()
234 	if (of_property_read_bool(dev->of_node, "gpio-ranges")) {  in zx_gpio_probe()
235 		chip->gc.request = gpiochip_generic_request;  in zx_gpio_probe()
236 		chip->gc.free = gpiochip_generic_free;  in zx_gpio_probe()
239 	id = of_alias_get_id(dev->of_node, "gpio");  in zx_gpio_probe()
240 	chip->gc.direction_input = zx_direction_input;  in zx_gpio_probe()
241 	chip->gc.direction_output = zx_direction_output;  in zx_gpio_probe()
242 	chip->gc.get = zx_get_value;  in zx_gpio_probe()
243 	chip->gc.set = zx_set_value;  in zx_gpio_probe()
244 	chip->gc.base = ZX_GPIO_NR * id;  in zx_gpio_probe()
245 	chip->gc.ngpio = ZX_GPIO_NR;  in zx_gpio_probe()
246 	chip->gc.label = dev_name(dev);  in zx_gpio_probe()
247 	chip->gc.parent = dev;  in zx_gpio_probe()
248 	chip->gc.owner = THIS_MODULE;  in zx_gpio_probe()
250 	ret = gpiochip_add_data(&chip->gc, chip);  in zx_gpio_probe()
257 	writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);  in zx_gpio_probe()
258 	writew_relaxed(0, chip->base + ZX_GPIO_IE);  in zx_gpio_probe()
262 		gpiochip_remove(&chip->gc);  in zx_gpio_probe()
263 		return -ENODEV;  in zx_gpio_probe()
266 	ret = gpiochip_irqchip_add(&chip->gc, &zx_irqchip,  in zx_gpio_probe()
271 		gpiochip_remove(&chip->gc);  in zx_gpio_probe()
274 	gpiochip_set_chained_irqchip(&chip->gc, &zx_irqchip,  in zx_gpio_probe()
285 		.compatible = "zte,zx296702-gpio",